xend: Restore bridge control register after secondary bus reset
authorKeir Fraser <keir.fraser@citrix.com>
Fri, 10 Oct 2008 10:52:26 +0000 (11:52 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Fri, 10 Oct 2008 10:52:26 +0000 (11:52 +0100)
From: Chris Dalton <cid@hp.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
tools/python/xen/util/pci.py

index ef9bb4fda65f08870da6c2bf85f5bae7bf663f1d..85bc0fc5552f594a40bb40ed37667261fa0f5330 100644 (file)
@@ -475,14 +475,17 @@ class PciDevice:
         sysfs_mnt = find_sysfs_mnt()
         parent_path = sysfs_mnt + SYSFS_PCI_DEVS_PATH + '/' + \
             target_bus + SYSFS_PCI_DEV_CONFIG_PATH
-        fd = os.open(parent_path, os.O_WRONLY)
+        fd = os.open(parent_path, os.O_RDWR)
+        # Save state of bridge control register - restore after reset
+        os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
+        br_cntl = (struct.unpack('H', os.read(fd, 2)))[0]
         # Assert Secondary Bus Reset
         os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
         os.write(fd, struct.pack('I', PCI_BRIDGE_CTL_BUS_RESET))
         time.sleep(0.200)
         # De-assert Secondary Bus Reset
-        os.lseek(fd, 0x3e, 0)
-        os.write(fd, struct.pack('I', 0x00))
+        os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
+        os.write(fd, struct.pack('H', br_cntl))
         time.sleep(0.200)
         os.close(fd)