x86/pv: Align %rsp before pushing the failsafe stack frame
authorAndrew Cooper <andrew.cooper3@citrix.com>
Fri, 5 May 2017 16:38:19 +0000 (17:38 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Tue, 9 May 2017 18:00:20 +0000 (19:00 +0100)
Architecturally, all 64bit stacks are aligned on a 16 byte boundary before an
exception frame is pushed.  The failsafe frame should not special in this
regard.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Release-acked-by: Julien Grall <julien.grall@arm.com>
xen/arch/x86/domain.c

index ef8c05a60b91a1e67885e13f3d4a14dca86ccae0..13cdc504dd258d8b18430373024255842256420b 100644 (file)
@@ -1743,9 +1743,8 @@ static void load_segments(struct vcpu *n)
         struct pv_vcpu *pv = &n->arch.pv_vcpu;
         struct cpu_user_regs *regs = guest_cpu_user_regs();
         unsigned long *rsp =
-            (n->arch.flags & TF_kernel_mode) ?
-            (unsigned long *)regs->rsp :
-            (unsigned long *)pv->kernel_sp;
+            (unsigned long *)(((n->arch.flags & TF_kernel_mode)
+                               ? regs->rsp : pv->kernel_sp) & ~0xf);
         unsigned long cs_and_mask, rflags;
 
         /* Fold upcall mask and architectural IOPL into RFLAGS.IF. */