return 0;
}
-#define WARN_BOGUS_WRITE(f, a...) \
- dprintk(XENLOG_INFO, "\n" \
- XENLOG_INFO "%s: apic=%d, pin=%d, irq=%d\n" \
- XENLOG_INFO "%s: new_entry=%08x\n" \
- XENLOG_INFO "%s: " f "\n", \
- __func__, apic, pin, irq, \
- __func__, *(u32 *)&rte, \
- __func__, ##a )
+#define WARN_BOGUS_WRITE(f, a...) \
+ dprintk(XENLOG_INFO, "IO-APIC: apic=%d, pin=%d, irq=%d\n" \
+ XENLOG_INFO "IO-APIC: new_entry=%08x\n" \
+ XENLOG_INFO "IO-APIC: " f "\n", \
+ apic, pin, irq, *(u32 *)&rte, ##a )
int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
{
spin_unlock_irqrestore(&ioapic_lock, flags);
rte.vector = desc->arch.vector;
if ( *(u32*)&rte != ret )
- WARN_BOGUS_WRITE("old_entry=%08x pirq=%d\n%s: "
- "Attempt to modify IO-APIC pin for in-use IRQ!",
- ret, pirq, __FUNCTION__);
+ WARN_BOGUS_WRITE("old_entry=%08x pirq=%d\n" XENLOG_INFO
+ "IO-APIC: Attempt to modify IO-APIC pin for in-use IRQ!",
+ ret, pirq);
return 0;
}
ret = &global_used_vector_map;
if ( desc->arch.used_vectors )
- {
- printk(XENLOG_INFO "%s: Strange, unassigned irq %d already has used_vectors!\n",
- __func__, irq);
- }
+ printk(XENLOG_INFO "Unassigned IRQ %d already has used_vectors\n",
+ irq);
else
{
int vector;
vector = irq_to_vector(irq);
if ( vector > 0 )
{
- printk(XENLOG_INFO "%s: Strange, irq %d already assigned vector %d!\n",
- __func__, irq, vector);
+ printk(XENLOG_INFO "IRQ %d already assigned vector %d\n",
+ irq, vector);
ASSERT(!test_bit(vector, ret));
* We know FP/SSE and YMM about eax, and nothing about edx at present.
*/
xsave_cntxt_size = _xstate_ctxt_size(feature_mask);
- printk("%s: using cntxt_size: %#x and states: %#"PRIx64"\n",
- __func__, xsave_cntxt_size, xfeature_mask);
+ printk("xstate: size: %#x and states: %#"PRIx64"\n",
+ xsave_cntxt_size, xfeature_mask);
asm ( "fxsave %0" : "=m" (ctxt) );
if ( ctxt.mxcsr_mask )