amd iommu: Introduce iommu_has_cap() function

Signed-off-by: Wei Wang <wei.wang2@amd.com>
Committed-by: Jan Beulich <jbeulich@suse.com>

diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
index ca71bf53bfd9151be9ac70d74041cc5502b1adc6..9ccd1f497d5d5103189b1d48d743a7f2d9ae4341 100644 (file)
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -79,9 +79,10 @@ static void set_iommu_ht_flags(struct amd_iommu *iommu)
     entry = readl(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
 
     /* Setup HT flags */
-    iommu_has_ht_flag(iommu, AMD_IOMMU_ACPI_HT_TUN_ENB_SHIFT) ?
-        iommu_set_bit(&entry, IOMMU_CONTROL_HT_TUNNEL_TRANSLATION_SHIFT):
-        iommu_clear_bit(&entry, IOMMU_CONTROL_HT_TUNNEL_TRANSLATION_SHIFT);
+    if ( iommu_has_cap(iommu, PCI_CAP_HT_TUNNEL_SHIFT) )
+        iommu_has_ht_flag(iommu, AMD_IOMMU_ACPI_HT_TUN_ENB_SHIFT) ?
+            iommu_set_bit(&entry, IOMMU_CONTROL_HT_TUNNEL_TRANSLATION_SHIFT) :
+            iommu_clear_bit(&entry, IOMMU_CONTROL_HT_TUNNEL_TRANSLATION_SHIFT);
 
     iommu_has_ht_flag(iommu, AMD_IOMMU_ACPI_RES_PASS_PW_SHIFT) ?
         iommu_set_bit(&entry, IOMMU_CONTROL_RESP_PASS_POSTED_WRITE_SHIFT):

diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index 2b249226bb10da76c991c0781386bde44ccae819..1a9204524e22df4c5dd7c2e12198e8f658887943 100644 (file)
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -996,7 +996,7 @@ void amd_iommu_flush_iotlb(struct pci_dev *pdev,
         return;
     }
 
-    if ( !iommu->iotlb_support )
+    if ( !iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
         return;
 
     req_id = get_dma_requestor_id(iommu->seg, bdf);

diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index b95162def91592a922437689f31dd5319b849d6b..149bbfc37185f68d58896ee261ac9304ac46d7cb 100644 (file)
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -115,7 +115,7 @@ static void amd_iommu_setup_domain_device(
             hd->paging_mode, valid);
 
         if ( pci_ats_device(iommu->seg, bus, devfn) &&
-             iommu->iotlb_support )
+             iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
             iommu_dte_set_iotlb((u32 *)dte, dte_i);
 
         invalidate_dev_table_entry(iommu, req_id);
@@ -307,7 +307,7 @@ void amd_iommu_disable_domain_device(struct domain *domain,
         disable_translation((u32 *)dte);
 
         if ( pci_ats_device(iommu->seg, bus, devfn) &&
-             iommu->iotlb_support )
+             iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
             iommu_dte_set_iotlb((u32 *)dte, 0);
 
         invalidate_dev_table_entry(iommu, req_id);

diff --git a/xen/include/asm-x86/amd-iommu.h b/xen/include/asm-x86/amd-iommu.h
index f2e0eb6ce2bcd2f6df07c205f7dded319b897358..9346da88b000adb333491e0de9f430302bb61f4b 100644 (file)
--- a/xen/include/asm-x86/amd-iommu.h
+++ b/xen/include/asm-x86/amd-iommu.h
@@ -53,10 +53,6 @@ struct amd_iommu {
     u16 cap_offset;
     iommu_cap_t cap;
 
-    u8 pte_not_present_cached;
-    u8 ht_tunnel_support;
-    u8 iotlb_support;
-
     u8 ht_flags;
 
     void *mmio_base;

diff --git a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h
index a1b87da71487e88debe6b66a3f6ef29c364e9666..c67f463f8b90247fe7e68381fd202117913e33c8 100644 (file)
--- a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h
+++ b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h
@@ -181,4 +181,10 @@ static inline uint32_t iommu_get_bit(uint32_t reg, uint32_t bit)
     return get_field_from_reg_u32(reg, 1U << bit, bit);
 }
 
+static inline int iommu_has_cap(struct amd_iommu *iommu, uint32_t bit)
+{
+    u32 mask = 1U << bit;
+    return iommu->cap.header & mask;
+}
+
 #endif /* _ASM_X86_64_AMD_IOMMU_PROTO_H */