} else if (dwc_otg_hcd->status_buf != NULL) {
DWC_FREE(dwc_otg_hcd->status_buf);
}
- DWC_SPINLOCK_FREE(dwc_otg_hcd->channel_lock);
DWC_SPINLOCK_FREE(dwc_otg_hcd->lock);
/* Set core_if's lock pointer to NULL */
dwc_otg_hcd->core_if->lock = NULL;
#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_SPINLOCK))
DWC_SPINLOCK_ALLOC_LINUX_DEBUG(hcd->lock);
- DWC_SPINLOCK_ALLOC_LINUX_DEBUG(hcd->channel_lock);
#else
hcd->lock = DWC_SPINLOCK_ALLOC();
- hcd->channel_lock = DWC_SPINLOCK_ALLOC();
#endif
DWC_DEBUGPL(DBG_HCDV, "init of HCD %p given core_if %p\n",
hcd, core_if);
dwc_otg_qh_t *qh;
int num_channels;
dwc_irqflags_t flags;
- dwc_spinlock_t *channel_lock = hcd->channel_lock;
dwc_otg_transaction_type_e ret_val = DWC_OTG_TRANSACTION_NONE;
#ifdef DEBUG_HOST_CHANNELS
if (microframe_schedule) {
// Make sure we leave one channel for non periodic transactions.
- DWC_SPINLOCK_IRQSAVE(channel_lock, &flags);
if (hcd->available_host_channels <= 1) {
- DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags);
break;
}
hcd->available_host_channels--;
- DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags);
#ifdef DEBUG_HOST_CHANNELS
last_sel_trans_num_per_scheduled++;
#endif /* DEBUG_HOST_CHANNELS */
* periodic assigned schedule.
*/
qh_ptr = DWC_LIST_NEXT(qh_ptr);
- DWC_SPINLOCK_IRQSAVE(channel_lock, &flags);
DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned,
&qh->qh_list_entry);
- DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags);
}
/*
}
if (microframe_schedule) {
- DWC_SPINLOCK_IRQSAVE(channel_lock, &flags);
if (hcd->available_host_channels < 1) {
- DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags);
break;
}
hcd->available_host_channels--;
- DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags);
#ifdef DEBUG_HOST_CHANNELS
last_sel_trans_num_nonper_scheduled++;
#endif /* DEBUG_HOST_CHANNELS */
* non-periodic active schedule.
*/
qh_ptr = DWC_LIST_NEXT(qh_ptr);
- DWC_SPINLOCK_IRQSAVE(channel_lock, &flags);
DWC_LIST_MOVE_HEAD(&hcd->non_periodic_sched_active,
&qh->qh_list_entry);
- DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags);
-
if (!microframe_schedule)
hcd->non_periodic_channels++;
static void release_channel_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh)
{
- dwc_irqflags_t flags;
- dwc_spinlock_t *channel_lock = hcd->channel_lock;
-
dwc_hc_t *hc = qh->channel;
if (dwc_qh_is_non_per(qh)) {
- DWC_SPINLOCK_IRQSAVE(channel_lock, &flags);
if (!microframe_schedule)
hcd->non_periodic_channels--;
else
hcd->available_host_channels++;
- DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags);
} else
update_frame_list(hcd, qh, 0);