arm: Zero the BSS at start of day.

Avoids surprises e.g. when loading via the boot-wrapper.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
Committed-by: Ian Campbell <ian.campbell@citrix.com>

diff --git a/xen/arch/arm/head.S b/xen/arch/arm/head.S
index cdbe0118205b70330a0a9155016a1f73cc23c604..9fdeda7c566ac53165c8c367faa66f9a1cfe437b 100644 (file)
--- a/xen/arch/arm/head.S
+++ b/xen/arch/arm/head.S
@@ -127,8 +127,26 @@ boot_cpu:
        add   pc, r0, r10            /* Call PA of function */
 
 hyp:
-       PRINT("- Setting up control registers -\r\n")
 
+       /* Zero BSS On the boot CPU to avoid nasty surprises */
+       teq   r12, #0
+       bne   skip_bss
+
+       PRINT("- Zero BSS -\r\n")
+       ldr   r0, =__bss_start       /* Load start & end of bss */
+       ldr   r1, =__bss_end
+       add   r0, r0, r10            /* Apply physical offset */
+       add   r1, r1, r10
+       
+       mov   r2, #0
+1:     str   r2, [r0], #4
+       cmp   r0, r1
+       blo   1b
+
+skip_bss:      
+
+       PRINT("- Setting up control registers -\r\n")
+       
        /* Set up memory attribute type tables */
        ldr   r0, =MAIR0VAL
        ldr   r1, =MAIR1VAL

diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S
index 6fb76628af0da3cf8ecd9228f559a2846ed7f1ed..f0f4cd3d9f2fcd1e0cd54bca4be34424ac6331ed 100644 (file)
--- a/xen/arch/arm/xen.lds.S
+++ b/xen/arch/arm/xen.lds.S
@@ -119,6 +119,7 @@ SECTIONS
        *(.bss.percpu.read_mostly)
        . = ALIGN(SMP_CACHE_BYTES);
        __per_cpu_data_end = .;
+       __bss_end = .;
   } :text
   _end = . ;