if ( !is_pae )
clear_bit(X86_FEATURE_PAE, regs[3]);
- clear_bit(X86_FEATURE_PSE36, regs[3]);
/* Filter all other features according to a whitelist. */
regs[2] &= ((is_64bit ? bitmaskof(X86_FEATURE_LAHF_LM) : 0) |
bitmaskof(X86_FEATURE_CMOV) |
bitmaskof(X86_FEATURE_PAT) |
bitmaskof(X86_FEATURE_CLFLSH) |
+ bitmaskof(X86_FEATURE_PSE36) |
bitmaskof(X86_FEATURE_MMX) |
bitmaskof(X86_FEATURE_FXSR) |
bitmaskof(X86_FEATURE_XMM) |
/* We always support MTRR MSRs. */
regs[3] |= bitmaskof(X86_FEATURE_MTRR);
- if ( !is_pae )
+ if ( !is_pae ) {
clear_bit(X86_FEATURE_PAE, regs[3]);
+ clear_bit(X86_FEATURE_PSE36, regs[3]);
+ }
break;
case 0x00000007: /* Intel-defined CPU features */
break;
case 0x80000001:
- if ( !is_pae )
+ if ( !is_pae ) {
clear_bit(X86_FEATURE_NX, regs[3]);
+ clear_bit(X86_FEATURE_PSE36, regs[3]);
+ }
break;
case 0x80000007:
if ( xsave_enabled(v) )
*ecx |= (v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_OSXSAVE) ?
cpufeat_mask(X86_FEATURE_OSXSAVE) : 0;
+
+ /* Only provide PSE36 when guest runs in 32bit PAE or in long mode */
+ if ( !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) )
+ *edx &= ~cpufeat_mask(X86_FEATURE_PSE36);
break;
case 0x7:
if ( (count == 0) && !cpu_has_smep )
/* Hide 1GB-superpage feature if we can't emulate it. */
if (!hvm_pse1gb_supported(d))
*edx &= ~cpufeat_mask(X86_FEATURE_PAGE1GB);
+ /* Only provide PSE36 when guest runs in 32bit PAE or in long mode */
+ if ( !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) )
+ *edx &= ~cpufeat_mask(X86_FEATURE_PSE36);
break;
}
}