Update m68k patch

diff --git a/debian/patches/0009-Remove-fixed-register-assignments-on-m68k.patch b/debian/patches/0009-Remove-fixed-register-assignments-on-m68k.patch
deleted file mode 100644 (file)
index 26bc069..0000000
--- a/debian/patches/0009-Remove-fixed-register-assignments-on-m68k.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From: Miod Vallat <miod@tarides.com>
-Date: Wed, 19 Jun 2024 13:13:03 +0000
-Subject: Remove fixed register assignments on m68k.
-
-The use of %a5 conflicts with its internal usage as a GOT base by Glibc, and
-given the scarce number of available registers on this platform, it is
-probably better to trust the compiler to perform register assignment here.
-
-Origin: https://github.com/ocaml/ocaml/pull/13252
----
- runtime/interp.c | 9 ++++++++-
- 1 file changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/runtime/interp.c b/runtime/interp.c
-index 66f0123..b688a6d 100644
---- a/runtime/interp.c
-+++ b/runtime/interp.c
-@@ -208,11 +208,18 @@ Caml_inline void check_trap_barrier_for_effect
- #define SP_REG asm("%r17")
- #define ACCU_REG asm("%r16")
- #endif
--#ifdef __mc68000__
-+#ifdef __mc68000__ /* { */
-+#ifdef __linux__
-+/* glibc relies upon %a5 to always contain the base address of the GOT. */
-+#define PC_REG asm("a3")
-+#define SP_REG asm("a4")
-+#define ACCU_REG asm("d7")
-+#else
- #define PC_REG asm("a5")
- #define SP_REG asm("a4")
- #define ACCU_REG asm("d7")
- #endif
-+#endif /* } __mc68000 */
- /* PR#4953: these specific registers not available in Thumb mode */
- #if defined (__arm__) && !defined(__thumb__)
- #define PC_REG asm("r6")

diff --git a/debian/patches/0009-Rework-fixed-register-assignments-on-m68k.patch b/debian/patches/0009-Rework-fixed-register-assignments-on-m68k.patch
new file mode 100644 (file)
index 0000000..7037579
--- /dev/null
+++ b/debian/patches/0009-Rework-fixed-register-assignments-on-m68k.patch
@@ -0,0 +1,25 @@
+From: Miod Vallat <miod@tarides.com>
+Date: Wed, 19 Jun 2024 13:13:03 +0000
+Subject: Rework fixed register assignments on m68k.
+
+The use of %a5 conflicts with its internal usage as a GOT base by Glibc,
+so shift assignments one register down.
+
+Origin: https://github.com/ocaml/ocaml/pull/13252
+---
+ runtime/interp.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/runtime/interp.c b/runtime/interp.c
+index 66f0123..05c61e3 100644
+--- a/runtime/interp.c
++++ b/runtime/interp.c
+@@ -209,7 +209,7 @@ Caml_inline void check_trap_barrier_for_effect
+ #define ACCU_REG asm("%r16")
+ #endif
+ #ifdef __mc68000__
+-#define PC_REG asm("a5")
++#define PC_REG asm("a3")
+ #define SP_REG asm("a4")
+ #define ACCU_REG asm("d7")
+ #endif

diff --git a/debian/patches/series b/debian/patches/series
index f7cb23dfc580fe0d3757c4e85277f4e80ac1bc30..a8185c734f0974b9c15053ca3dffa87d31f591a8 100644 (file)
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -6,5 +6,5 @@
 0007-Put-manpages-in-section-3o-instead-of-3.patch
 0008-Filter-out-f-debug-file-prefix-map-from-ocamlc_cflag.patch
 0008-Fix-call-to-test-in-configure.ac.patch
-0009-Remove-fixed-register-assignments-on-m68k.patch
+0009-Rework-fixed-register-assignments-on-m68k.patch
 0010-Detect-if-atomic-64-bit-load-from-RO-memory-works.patch