Print status of Flush Filter on AMD64 processors during
authorkaf24@firebug.cl.cam.ac.uk <kaf24@firebug.cl.cam.ac.uk>
Wed, 24 Aug 2005 16:15:42 +0000 (16:15 +0000)
committerkaf24@firebug.cl.cam.ac.uk <kaf24@firebug.cl.cam.ac.uk>
Wed, 24 Aug 2005 16:15:42 +0000 (16:15 +0000)
Xen boot. Also provide a new boot parameter:
 amd_flush_filter=on  : Forcibly enable the Filter
 amd_flush_filter=off : Forcibly disable the Filter

Signed-off-by: Keir Fraser <keir@xensource.com>
xen/arch/x86/cpu/amd.c

index 4b49e17f37005baa64300c8374a21b9f76b001f9..9692d6712d2c2b99d25bdf116b6c9995790133e1 100644 (file)
@@ -9,6 +9,20 @@
 
 #include "cpu.h"
 
+/*
+ * amd_flush_filter={on,off}. Forcibly Enable or disable the TLB flush
+ * filter on AMD 64-bit processors.
+ */
+static int flush_filter_force;
+static void flush_filter(char *s)
+{
+       if (!strcmp(s, "off"))
+               flush_filter_force = -1;
+       if (!strcmp(s, "on"))
+               flush_filter_force = 1;
+}
+custom_param("amd_flush_filter", flush_filter);
+
 #define num_physpages 0
 
 /*
@@ -192,6 +206,21 @@ static void __init init_amd(struct cpuinfo_x86 *c)
                break;
        }
 
+       if (c->x86 == 15) {
+               rdmsr(MSR_K7_HWCR, l, h);
+               printk(KERN_INFO "CPU%d: AMD Flush Filter %sabled",
+                      smp_processor_id(), (l & (1<<6)) ? "dis" : "en");
+               if ((flush_filter_force > 0) && (l & (1<<6))) {
+                       l &= ~(1<<6);
+                       printk(" -> Forcibly enabled");
+               } else if ((flush_filter_force < 0) && !(l & (1<<6))) {
+                       l |= 1<<6;
+                       printk(" -> Forcibly disabled");
+               }
+               wrmsr(MSR_K7_HWCR, l, h);
+               printk("\n");
+       }
+
        display_cacheinfo(c);
 
        if (cpuid_eax(0x80000000) >= 0x80000008) {