ACPI: Grant access of MSR_IA32_THERM_CONTROL MSR to dom0

The purpose is to support dom0 throttling control via MSR.

Signed-off-by: Wei Gang <gang.wei@intel.com>

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index f7fdb4d1f25d1016378455abac656af120d51051..f40a1ed3f73bbc911ba536a53e171d48257ea160 100644 (file)
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2154,6 +2154,12 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
             if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
                 goto fail;
             break;
+        case MSR_IA32_THERM_CONTROL:
+            if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+                goto fail;
+            if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
+                goto fail;
+            break;
         default:
             if ( wrmsr_hypervisor_regs(regs->ecx, eax, edx) )
                 break;
@@ -2230,6 +2236,12 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
                          MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL |
                          MSR_IA32_MISC_ENABLE_XTPR_DISABLE;
             break;
+        case MSR_IA32_THERM_CONTROL:
+            if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+                goto fail;
+            if ( rdmsr_safe(regs->ecx, regs->eax, regs->edx) )
+                goto fail;
+            break;
         default:
             if ( rdmsr_hypervisor_regs(regs->ecx, &l, &h) )
             {