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x86emul: SYSRET must change CPL
author
Jan Beulich
<jbeulich@suse.com>
Tue, 21 Apr 2020 08:51:42 +0000
(10:51 +0200)
committer
Jan Beulich
<jbeulich@suse.com>
Tue, 21 Apr 2020 08:51:42 +0000
(10:51 +0200)
The special AMD behavior of leaving SS mostly alone wasn't really
complete: We need to adjust CPL aka SS.DPL.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/x86_emulate/x86_emulate.c
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diff --git
a/xen/arch/x86/x86_emulate/x86_emulate.c
b/xen/arch/x86/x86_emulate/x86_emulate.c
index 3ed64c13ea85f093c45b7ff6c297f421e4fbb5a6..1959fc227a708cf8b0fe58e848ed008fc5dd6e2b 100644
(file)
--- a/
xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/
xen/arch/x86/x86_emulate/x86_emulate.c
@@
-6022,6
+6022,8
@@
x86_emulate(
/* There's explicitly no RPL adjustment here. */
sreg.sel = (msr_val >> 48) + 8;
+ /* But DPL needs adjustment, for the new CPL to be correct. */
+ sreg.dpl = 3;
}
#ifdef __x86_64__