Raising #GP under such circumstances is architecturally wrong.
Refer to the Intel or AMD manuals describing faults, and the conditions
under which #SS is raised.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Tim Deegan <tim@xen.org>
Release-acked-by: Wei Liu <wei.liu2@citrix.com>
/* This is a singleton operation: fail it with an exception. */
hvmemul_ctxt->exn_pending = 1;
- hvmemul_ctxt->trap.vector = TRAP_gp_fault;
+ hvmemul_ctxt->trap.vector =
+ (seg == x86_seg_ss) ? TRAP_stack_error : TRAP_gp_fault;
hvmemul_ctxt->trap.type = X86_EVENTTYPE_HW_EXCEPTION;
hvmemul_ctxt->trap.error_code = 0;
hvmemul_ctxt->trap.insn_len = 0;
if ( !okay )
{
- hvm_inject_hw_exception(TRAP_gp_fault, 0);
+ hvm_inject_hw_exception(
+ (seg == x86_seg_ss) ? TRAP_stack_error : TRAP_gp_fault, 0);
return X86EMUL_EXCEPTION;
}