debug_build() ? 'y' : 'n', print_tainted(taint_str));
}
-uint32_t *select_user_reg(struct cpu_user_regs *regs, int reg)
+register_t *select_user_reg(struct cpu_user_regs *regs, int reg)
{
BUG_ON( !guest_mode(regs) );
switch ( reg ) {
case 0 ... 7: /* Unbanked registers */
- BUILD_BUG_ON(REGOFFS(r0) + 7*sizeof(uint32_t) != REGOFFS(r7));
+ BUILD_BUG_ON(REGOFFS(r0) + 7*sizeof(register_t) != REGOFFS(r7));
return ®s->r0 + reg;
case 8 ... 12: /* Register banked in FIQ mode */
- BUILD_BUG_ON(REGOFFS(r8_fiq) + 4*sizeof(uint32_t) != REGOFFS(r12_fiq));
+ BUILD_BUG_ON(REGOFFS(r8_fiq) + 4*sizeof(register_t) != REGOFFS(r12_fiq));
if ( fiq_mode(regs) )
return ®s->r8_fiq + reg - 8;
else
return ®s->r8 + reg - 8;
case 13 ... 14: /* Banked SP + LR registers */
- BUILD_BUG_ON(REGOFFS(sp_fiq) + 1*sizeof(uint32_t) != REGOFFS(lr_fiq));
- BUILD_BUG_ON(REGOFFS(sp_irq) + 1*sizeof(uint32_t) != REGOFFS(lr_irq));
- BUILD_BUG_ON(REGOFFS(sp_svc) + 1*sizeof(uint32_t) != REGOFFS(lr_svc));
- BUILD_BUG_ON(REGOFFS(sp_abt) + 1*sizeof(uint32_t) != REGOFFS(lr_abt));
- BUILD_BUG_ON(REGOFFS(sp_und) + 1*sizeof(uint32_t) != REGOFFS(lr_und));
+ BUILD_BUG_ON(REGOFFS(sp_fiq) + 1*sizeof(register_t) != REGOFFS(lr_fiq));
+ BUILD_BUG_ON(REGOFFS(sp_irq) + 1*sizeof(register_t) != REGOFFS(lr_irq));
+ BUILD_BUG_ON(REGOFFS(sp_svc) + 1*sizeof(register_t) != REGOFFS(lr_svc));
+ BUILD_BUG_ON(REGOFFS(sp_abt) + 1*sizeof(register_t) != REGOFFS(lr_abt));
+ BUILD_BUG_ON(REGOFFS(sp_und) + 1*sizeof(register_t) != REGOFFS(lr_und));
switch ( regs->cpsr & PSR_MODE_MASK )
{
case PSR_MODE_USR:
printk("GUEST STACK GOES HERE\n");
}
-#define STACK_BEFORE_EXCEPTION(regs) ((uint32_t*)(regs)->sp)
+#define STACK_BEFORE_EXCEPTION(regs) ((register_t*)(regs)->sp)
static void show_trace(struct cpu_user_regs *regs)
{
- uint32_t *frame, next, addr, low, high;
+ register_t *frame, next, addr, low, high;
printk("Xen call trace:\n ");
print_symbol(" %s\n ", regs->pc);
/* Bounds for range of valid frame pointer. */
- low = (uint32_t)(STACK_BEFORE_EXCEPTION(regs)/* - 2*/);
+ low = (register_t)(STACK_BEFORE_EXCEPTION(regs)/* - 2*/);
high = (low & ~(STACK_SIZE - 1)) +
(STACK_SIZE - sizeof(struct cpu_info));
break;
{
/* Ordinary stack frame. */
- frame = (uint32_t *)next;
+ frame = (register_t *)next;
next = frame[-1];
addr = frame[0];
}
printk("[<%p>]", _p(addr));
print_symbol(" %s\n ", addr);
- low = (uint32_t)&frame[1];
+ low = (register_t)&frame[1];
}
printk("\n");
void show_stack(struct cpu_user_regs *regs)
{
- uint32_t *stack = STACK_BEFORE_EXCEPTION(regs), addr;
+ register_t *stack = STACK_BEFORE_EXCEPTION(regs), addr;
int i;
if ( guest_mode(regs) )
static void do_debug_trap(struct cpu_user_regs *regs, unsigned int code)
{
- uint32_t reg, *r;
+ register_t *r;
+ uint32_t reg;
uint32_t domid = current->domain->domain_id;
switch ( code ) {
case 0xe0 ... 0xef:
reg = code - 0xe0;
r = select_user_reg(regs, reg);
- printk("DOM%d: R%d = %#010"PRIx32" at %#010"PRIx32"\n",
+ printk("DOM%d: R%d = 0x%"PRIregister" at 0x%"PRIvaddr"\n",
domid, reg, *r, regs->pc);
break;
case 0xfd:
- printk("DOM%d: Reached %#010"PRIx32"\n", domid, regs->pc);
+ printk("DOM%d: Reached %"PRIvaddr"\n", domid, regs->pc);
break;
case 0xfe:
- printk("%c", (char)(regs->r0 & 0xff));
+ r = select_user_reg(regs, 0);
+ printk("%c", (char)(*r & 0xff));
break;
case 0xff:
printk("DOM%d: DEBUG\n", domid);
union hsr hsr)
{
struct hsr_cp32 cp32 = hsr.cp32;
- uint32_t *r = select_user_reg(regs, cp32.reg);
+ uint32_t *r = (uint32_t*)select_user_reg(regs, cp32.reg);
if ( !cp32.ccvalid ) {
dprintk(XENLOG_ERR, "cp_15(32): need to handle invalid condition codes\n");
BUG_ON(!vtimer_emulate(regs, hsr));
break;
default:
- printk("%s p15, %d, r%d, cr%d, cr%d, %d @ %#08x\n",
+ printk("%s p15, %d, r%d, cr%d, cr%d, %d @ 0x%"PRIregister"\n",
cp32.read ? "mrc" : "mcr",
cp32.op1, cp32.reg, cp32.crn, cp32.crm, cp32.op2, regs->pc);
panic("unhandled 32-bit CP15 access %#x\n", hsr.bits & HSR_CP32_REGS_MASK);
BUG_ON(!vtimer_emulate(regs, hsr));
break;
default:
- printk("%s p15, %d, r%d, r%d, cr%d @ %#08x\n",
+ printk("%s p15, %d, r%d, r%d, cr%d @ 0x%"PRIregister"\n",
cp64.read ? "mrrc" : "mcrr",
cp64.op1, cp64.reg1, cp64.reg2, cp64.crm, regs->pc);
panic("unhandled 64-bit CP15 access %#x\n", hsr.bits & HSR_CP64_REGS_MASK);
{
struct hsr_dabt dabt = info->dabt;
struct cpu_user_regs *regs = guest_cpu_user_regs();
- uint32_t *r = select_user_reg(regs, dabt.reg);
+ register_t *r = select_user_reg(regs, dabt.reg);
struct vgic_irq_rank *rank;
int offset = (int)(info->gpa - VGIC_DISTR_BASE_ADDRESS);
int gicd_reg = REG(offset);
{
struct hsr_dabt dabt = info->dabt;
struct cpu_user_regs *regs = guest_cpu_user_regs();
- uint32_t *r = select_user_reg(regs, dabt.reg);
+ register_t *r = select_user_reg(regs, dabt.reg);
struct vgic_irq_rank *rank;
int offset = (int)(info->gpa - VGIC_DISTR_BASE_ADDRESS);
int gicd_reg = REG(offset);
case GICD_ISPENDR ... GICD_ISPENDRN:
if ( dabt.size != 0 && dabt.size != 2 ) goto bad_width;
- printk("vGICD: unhandled %s write %#"PRIx32" to ISPENDR%d\n",
+ printk("vGICD: unhandled %s write %#"PRIregister" to ISPENDR%d\n",
dabt.size ? "word" : "byte", *r, gicd_reg - GICD_ISPENDR);
return 0;
case GICD_ICPENDR ... GICD_ICPENDRN:
if ( dabt.size != 0 && dabt.size != 2 ) goto bad_width;
- printk("vGICD: unhandled %s write %#"PRIx32" to ICPENDR%d\n",
+ printk("vGICD: unhandled %s write %#"PRIregister" to ICPENDR%d\n",
dabt.size ? "word" : "byte", *r, gicd_reg - GICD_ICPENDR);
return 0;
case GICD_SGIR:
if ( dabt.size != 2 ) goto bad_width;
- printk("vGICD: unhandled write %#"PRIx32" to ICFGR%d\n",
+ printk("vGICD: unhandled write %#"PRIregister" to ICFGR%d\n",
*r, gicd_reg - GICD_ICFGR);
return 0;
case GICD_CPENDSGIR ... GICD_CPENDSGIRN:
if ( dabt.size != 0 && dabt.size != 2 ) goto bad_width;
- printk("vGICD: unhandled %s write %#"PRIx32" to ICPENDSGIR%d\n",
+ printk("vGICD: unhandled %s write %#"PRIregister" to ICPENDSGIR%d\n",
dabt.size ? "word" : "byte", *r, gicd_reg - GICD_CPENDSGIR);
return 0;
case GICD_SPENDSGIR ... GICD_SPENDSGIRN:
if ( dabt.size != 0 && dabt.size != 2 ) goto bad_width;
- printk("vGICD: unhandled %s write %#"PRIx32" to ISPENDSGIR%d\n",
+ printk("vGICD: unhandled %s write %#"PRIregister" to ISPENDSGIR%d\n",
dabt.size ? "word" : "byte", *r, gicd_reg - GICD_SPENDSGIR);
return 0;
goto write_ignore;
default:
- printk("vGICD: unhandled write r%d=%"PRIx32" offset %#08x\n",
+ printk("vGICD: unhandled write r%d=%"PRIregister" offset %#08x\n",
dabt.reg, *r, offset);
return 0;
}
bad_width:
- printk("vGICD: bad write width %d r%d=%"PRIx32" offset %#08x\n",
+ printk("vGICD: bad write width %d r%d=%"PRIregister" offset %#08x\n",
dabt.size, dabt.reg, *r, offset);
domain_crash_synchronous();
return 0;