cache: export clean and invalidate

diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index a134d8a13d001ee8ad4b1084c9a71c1dc9f8d832..2ddf36403d1c8f6dcade00ef2fffd44bf2e5c4e4 100644 (file)
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -349,7 +349,7 @@ ENDPROC(v7_flush_kern_dcache_area)
  *     - start   - virtual start address of region
  *     - end     - virtual end address of region
  */
-v7_dma_inv_range:
+ENTRY(v7_dma_inv_range)
        dcache_line_size r2, r3
        sub     r3, r2, #1
        tst     r0, r3
@@ -377,7 +377,7 @@ ENDPROC(v7_dma_inv_range)
  *     - start   - virtual start address of region
  *     - end     - virtual end address of region
  */
-v7_dma_clean_range:
+ENTRY(v7_dma_clean_range)
        dcache_line_size r2, r3
        sub     r3, r2, #1
        bic     r0, r0, r3