x86, hpet: Fix initialisation of secondary timers.
authorKeir Fraser <keir.fraser@citrix.com>
Thu, 20 Nov 2008 14:15:50 +0000 (14:15 +0000)
committerKeir Fraser <keir.fraser@citrix.com>
Thu, 20 Nov 2008 14:15:50 +0000 (14:15 +0000)
Each channel may have different settings, and in the original
implementation, other Tn configuration will accidently overwrite T0
configuration.

Signed-off-by: Guanqun Lu <guanqun.lu@intel.com>
xen/arch/x86/hpet.c
xen/include/asm-x86/hpet.h

index e72e8f94e46d9ac4b9307b6144281c3423cb0cbc..d5e84f4ccd26af8114fb6ef56c82bab3574be736 100644 (file)
@@ -276,9 +276,9 @@ u64 hpet_setup(void)
     set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
 
     hpet_id = hpet_read32(HPET_ID);
-    if ( hpet_id == 0 )
+    if ( (hpet_id & HPET_ID_REV) == 0 )
     {
-        printk("BAD HPET vendor id.\n");
+        printk("BAD HPET revision id.\n");
         return 0;
     }
 
@@ -296,9 +296,9 @@ u64 hpet_setup(void)
 
     for ( i = 0; i <= ((hpet_id >> 8) & 31); i++ )
     {
-        cfg = hpet_read32(HPET_T0_CFG + i*0x20);
+        cfg = hpet_read32(HPET_Tn_CFG(i));
         cfg &= ~HPET_TN_ENABLE;
-        hpet_write32(cfg & ~HPET_TN_ENABLE, HPET_T0_CFG);
+        hpet_write32(cfg, HPET_Tn_CFG(i));
     }
 
     cfg = hpet_read32(HPET_CFG);
index b63f56805d82341aa4d143f921f00add6381243d..82c08bc3c52e50c0d2759ec9a8b2759716f1fc2c 100644 (file)
 #define HPET_T2_CMP    0x148
 #define HPET_T2_ROUTE  0x150
 
+#define HPET_Tn_CFG(n)      (HPET_T0_CFG + n * 0x20)
+#define HPET_Tn_CMP(n)      (HPET_T0_CMP + n * 0x20)
+#define HPET_Tn_ROUTE(n)    (HPET_T0_ROUTE + n * 0x20)
+
 #define HPET_ID_VENDOR 0xffff0000
 #define HPET_ID_LEGSUP 0x00008000
 #define HPET_ID_NUMBER 0x00001f00