Ensure percpu data area not used before the TR is set.
authorfred@xuni-t01.sc.intel.com <fred@xuni-t01.sc.intel.com>
Wed, 24 Aug 2005 02:43:18 +0000 (18:43 -0800)
committerfred@xuni-t01.sc.intel.com <fred@xuni-t01.sc.intel.com>
Wed, 24 Aug 2005 02:43:18 +0000 (18:43 -0800)
xen/arch/ia64/ivt.S
xen/arch/ia64/linux-xen/head.S
xen/arch/ia64/linux-xen/setup.c
xen/arch/ia64/xensetup.c

index 5346453b4ab06c6e63800bbe90e64b3bc83e3746..82866a2d6751cd7a1d50c4c9df9b23aece64eb33 100644 (file)
@@ -136,7 +136,11 @@ ENTRY(vhpt_miss)
        ;;
        rsm psr.dt                              // use physical addressing for data
        mov r31=pr                              // save the predicate registers
+#ifdef XEN
+       movl r19=THIS_CPU(cpu_kr)+IA64_KR_PT_BASE_OFFSET;;
+#else
        mov r19=IA64_KR(PT_BASE)                // get page table base address
+#endif
        shl r21=r16,3                           // shift bit 60 into sign bit
        shr.u r17=r16,61                        // get the region number into r17
        ;;
@@ -503,7 +507,11 @@ ENTRY(nested_dtlb_miss)
         * Clobbered:   b0, r18, r19, r21, psr.dt (cleared)
         */
        rsm psr.dt                              // switch to using physical data addressing
+#ifdef XEN
+       movl r19=THIS_CPU(cpu_kr)+IA64_KR_PT_BASE_OFFSET;;
+#else
        mov r19=IA64_KR(PT_BASE)                // get the page table base address
+#endif
        shl r21=r16,3                           // shift bit 60 into sign bit
        ;;
        shr.u r17=r16,61                        // get the region number into r17
index 4328c3b076b067b811111989f2eba286c0a3592e..4cd195c57e2fb6536809757c5e91f5d3b4f402f7 100644 (file)
@@ -226,6 +226,8 @@ start_ap:
        bsw.1
        ;;
 #else // CONFIG_VTI
+       mov IA64_KR(CURRENT)=r2
+       mov IA64_KR(CURRENT_STACK)=r16
 #endif // CONFIG_VTI
        mov r13=r2
        /*
index 0b6fb0b289fc50ba50b2cda174bcd61f98f60a61..06338eba52a8ce5ad5edf01a8564b8f6474b8b83 100644 (file)
@@ -260,9 +260,9 @@ io_port_init (void)
        phys_iobase = efi_get_iobase();
        if (phys_iobase)
                /* set AR.KR0 since this is all we use it for anyway */
-               __get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE]=phys_iobase;
+               ia64_set_kr(IA64_KR_IO_BASE, phys_iobase);
        else {
-               phys_iobase=__get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE];
+               phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
                printk(KERN_INFO "No I/O port range found in EFI memory map, falling back "
                       "to AR.KR0\n");
                printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
@@ -609,8 +609,6 @@ void
 setup_per_cpu_areas (void)
 {
        /* start_kernel() requires this... */
-       __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT] = current;
-       __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT_STACK] = -1;
 }
 
 static void
@@ -668,8 +666,8 @@ cpu_init (void)
         * physical addresses of per cpu variables with a simple:
         *   phys = ar.k3 + &per_cpu_var
         */
-//     ia64_set_kr(IA64_KR_PER_CPU_DATA,
-//                 ia64_tpa(cpu_data) - (long) __per_cpu_start);
+       ia64_set_kr(IA64_KR_PER_CPU_DATA,
+                   ia64_tpa(cpu_data) - (long) __per_cpu_start);
 
        get_max_cacheline_size();
 
@@ -699,7 +697,7 @@ cpu_init (void)
        /* Clear the stack memory reserved for pt_regs: */
        memset(ia64_task_regs(current), 0, sizeof(struct pt_regs));
 
-       __get_cpu_var(cpu_kr)._kr[IA64_KR_FPU_OWNER] = 0;
+       ia64_set_kr(IA64_KR_FPU_OWNER, 0);
 
        /*
         * Initialize default control register to defer all speculative faults.  The
index 3c07df67f9b86453fe10e366ceb9f62f21c97313..363c845618d80a0f1a1c25f544ab8ce21d1fc06e 100644 (file)
@@ -261,6 +261,14 @@ printk("About to call ac_timer_init()\n");
 printk("About to call sort_main_extable()\n");
     sort_main_extable();
 
+    /* surrender usage of kernel registers to domain, use percpu area instead */
+    __get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE] = ia64_get_kr(IA64_KR_IO_BASE);
+    __get_cpu_var(cpu_kr)._kr[IA64_KR_PER_CPU_DATA] = ia64_get_kr(IA64_KR_PER_CPU_DATA);
+    __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT_STACK] = ia64_get_kr(IA64_KR_CURRENT_STACK);
+    __get_cpu_var(cpu_kr)._kr[IA64_KR_FPU_OWNER] = ia64_get_kr(IA64_KR_FPU_OWNER);
+    __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT] = ia64_get_kr(IA64_KR_CURRENT);
+    __get_cpu_var(cpu_kr)._kr[IA64_KR_PT_BASE] = ia64_get_kr(IA64_KR_PT_BASE);
+
     /* Create initial domain 0. */
 printk("About to call do_createdomain()\n");
     dom0 = do_createdomain(0, 0);