CPUIDLE: Disable APIC timer intr during C3 while force hpetbroadcast

It can avoid C3 early exit, and also this is conceptually clearer, as
at given time we only want one clock source to drive timers.

Signed-off-by: Wei Gang <gang.wei@intel.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>

diff --git a/xen/arch/x86/hpet.c b/xen/arch/x86/hpet.c
index 3857cb0af6e7e15f7e1cfd49157e04707f029757..5a660245b663c34e5cb27ced65a4ba5fbdb568ea 100644 (file)
--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -215,6 +215,8 @@ void hpet_broadcast_enter(void)
 
     spin_lock(&ch->lock);
 
+    disable_APIC_timer();
+
     cpu_set(smp_processor_id(), ch->cpumask);
 
     /* reprogram if current cpu expire time is nearer */
@@ -233,15 +235,13 @@ void hpet_broadcast_exit(void)
 
     if ( cpu_test_and_clear(cpu, ch->cpumask) )
     {
+        /* Cancel any outstanding LAPIC event and re-enable interrupts. */
+        reprogram_timer(0);
+        enable_APIC_timer();
+        
+        /* Reprogram the deadline; trigger timer work now if it has passed. */
         if ( !reprogram_timer(per_cpu(timer_deadline, cpu)) )
-        {
-            /*
-             * The deadline must have passed -- trigger timer work now.
-             * Also cancel any outstanding LAPIC event.
-             */
-            reprogram_timer(0);
             raise_softirq(TIMER_SOFTIRQ);
-        }
 
         if ( cpus_empty(ch->cpumask) && ch->next_event != STIME_MAX )
             reprogram_hpet_evt_channel(ch, STIME_MAX, 0, 0);