branch-updates

# DP: updates from the binutils-2.31 branch

# git diff 0860693812fff944ab0602e72b762a4a2078da5b 87b30c0845ceb4a6634f8e0e2580fa7ae3992899

Gbp-Pq: Name branch-updates.diff

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 5ec906aa8e83fe89f7851cf0dbda74e21a0bffa7..d3831b7a65f41987a16ffe3da868b178223084f9 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,8 +1,20 @@
+2018-07-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/23428
+       * elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): If the
+       separate code program header is needed, make sure that the first
+       read-only PT_LOAD segment has no code by adding a
+       GNU_PROPERTY_X86_ISA_1_USED note.
+
+2018-07-18  Nick Clifton  <nickc@redhat.com>
+
+       * development.sh: Set to true.
+
 2018-07-18  Nick Clifton  <nickc@redhat.com>
 
        2.31.1 Release point.
        * version.m4: Set to 2.31.1
-       * development.sh: Set to true.
+       * development.sh: Set to false.
        * configure: Regenerate.
        * po/bfd.pot: Regenerate.
 

diff --git a/bfd/development.sh b/bfd/development.sh
index 918150f30b3ca835424412d744fd29d656002b56..27a7150e6ded073f53dd378a5a8a6da6ab286bf4 100644 (file)
--- a/bfd/development.sh
+++ b/bfd/development.sh
@@ -16,4 +16,4 @@
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 # Controls whether to enable development-mode features by default.
-development=false
+development=true

diff --git a/bfd/elfxx-x86.c b/bfd/elfxx-x86.c
index a2497aab8630a0fd675f515577f5e89e487fb4ae..2e4ff88f1fa576c0c0f58d696b6795ade44a88c5 100644 (file)
--- a/bfd/elfxx-x86.c
+++ b/bfd/elfxx-x86.c
@@ -2524,6 +2524,7 @@ _bfd_x86_elf_link_setup_gnu_properties
   const struct elf_backend_data *bed;
   unsigned int class_align = ABI_64_P (info->output_bfd) ? 3 : 2;
   unsigned int got_align;
+  bfd_boolean has_text = FALSE;
 
   features = 0;
   if (info->ibt)
@@ -2538,24 +2539,59 @@ _bfd_x86_elf_link_setup_gnu_properties
     if (bfd_get_flavour (pbfd) == bfd_target_elf_flavour
        && bfd_count_sections (pbfd) != 0)
       {
+       if (!has_text)
+         {
+           /* Check if there is no non-empty text section.  */
+           sec = bfd_get_section_by_name (pbfd, ".text");
+           if (sec != NULL && sec->size != 0)
+             has_text = TRUE;
+         }
+
        ebfd = pbfd;
 
        if (elf_properties (pbfd) != NULL)
          break;
       }
 
-  if (ebfd != NULL && features)
+  bed = get_elf_backend_data (info->output_bfd);
+
+  htab = elf_x86_hash_table (info, bed->target_id);
+  if (htab == NULL)
+    return pbfd;
+
+  if (ebfd != NULL)
     {
-      /* If features is set, add GNU_PROPERTY_X86_FEATURE_1_IBT and
-        GNU_PROPERTY_X86_FEATURE_1_SHSTK.  */
-      prop = _bfd_elf_get_property (ebfd,
-                                   GNU_PROPERTY_X86_FEATURE_1_AND,
-                                   4);
-      prop->u.number |= features;
-      prop->pr_kind = property_number;
+      prop = NULL;
+      if (features)
+       {
+         /* If features is set, add GNU_PROPERTY_X86_FEATURE_1_IBT and
+            GNU_PROPERTY_X86_FEATURE_1_SHSTK.  */
+         prop = _bfd_elf_get_property (ebfd,
+                                       GNU_PROPERTY_X86_FEATURE_1_AND,
+                                       4);
+         prop->u.number |= features;
+         prop->pr_kind = property_number;
+       }
+      else if (has_text
+              && elf_properties (ebfd) == NULL
+              && elf_tdata (info->output_bfd)->o->build_id.sec == NULL
+              && !htab->elf.dynamic_sections_created
+              && !info->traditional_format
+              && (info->output_bfd->flags & D_PAGED) != 0
+              && info->separate_code)
+       {
+         /* If the separate code program header is needed, make sure
+            that the first read-only PT_LOAD segment has no code by
+            adding a GNU_PROPERTY_X86_ISA_1_USED note.  */
+         prop = _bfd_elf_get_property (ebfd,
+                                       GNU_PROPERTY_X86_ISA_1_USED,
+                                       4);
+         prop->u.number = GNU_PROPERTY_X86_ISA_1_486;
+         prop->pr_kind = property_number;
+       }
 
       /* Create the GNU property note section if needed.  */
-      if (pbfd == NULL)
+      if (prop != NULL && pbfd == NULL)
        {
          sec = bfd_make_section_with_flags (ebfd,
                                             NOTE_GNU_PROPERTY_SECTION_NAME,
@@ -2581,12 +2617,6 @@ error_alignment:
 
   pbfd = _bfd_elf_link_setup_gnu_properties (info);
 
-  bed = get_elf_backend_data (info->output_bfd);
-
-  htab = elf_x86_hash_table (info, bed->target_id);
-  if (htab == NULL)
-    return pbfd;
-
   htab->r_info = init_table->r_info;
   htab->r_sym = init_table->r_sym;
 

diff --git a/bfd/version.h b/bfd/version.h
index 222d2e62c393455ef81d7ce62d269533d3908c08..d80e719e085ce5bbaf2d24d695a223dc1a501778 100644 (file)
--- a/bfd/version.h
+++ b/bfd/version.h
@@ -16,7 +16,7 @@
 
    In releases, the date is not included in either version strings or
    sonames.  */
-#define BFD_VERSION_DATE 20180718
+#define BFD_VERSION_DATE 20180726
 #define BFD_VERSION @bfd_version@
 #define BFD_VERSION_STRING  @bfd_version_package@ @bfd_version_string@
 #define REPORT_BUGS_TO @report_bugs_to@

diff --git a/gas/ChangeLog b/gas/ChangeLog
index bb4541900dd79243e2e8931b68cb4cdbe7ef4637..355b2ff826df99bcdc4965b50133bbab33a982ea 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2018-07-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/23418
+       * testsuite/gas/i386/xmmword.s: Add tests for vcvtps2qq,
+       vcvtps2uqq, vcvttps2qq and vcvttps2uqq.
+       * testsuite/gas/i386/xmmword.l: Updated.
+
 2018-07-18  Nick Clifton  <nickc@redhat.com>
 
        2.31.1 Release point.

diff --git a/gas/testsuite/gas/i386/xmmword.l b/gas/testsuite/gas/i386/xmmword.l
index ce3af8d1501a30e12336c6759eba0a4083732463..7d25cb3de2ee9b78c68f34d78b21605cabb8ea2c 100644 (file)
--- a/gas/testsuite/gas/i386/xmmword.l
+++ b/gas/testsuite/gas/i386/xmmword.l
@@ -99,3 +99,7 @@
 .*:127: Error: .* `vpmovzxwq'
 .*:128: Error: .* `vpmovzxwq'
 .*:129: Error: .* `vpmovzxwq'
+.*:131: Error: .* `vcvtps2qq'
+.*:132: Error: .* `vcvtps2uqq'
+.*:133: Error: .* `vcvttps2qq'
+.*:134: Error: .* `vcvttps2uqq'

diff --git a/gas/testsuite/gas/i386/xmmword.s b/gas/testsuite/gas/i386/xmmword.s
index 47d2d8d595807001705940dd7e91697d61f3228b..ffe7aca3cb1200ac5f6849e1a41110b084459db1 100644 (file)
--- a/gas/testsuite/gas/i386/xmmword.s
+++ b/gas/testsuite/gas/i386/xmmword.s
@@ -127,3 +127,8 @@ xmmword:
        vpmovzxwq       xmm0{k7}, xmmword ptr [eax]
        vpmovzxwq       ymm0, xmmword ptr [eax]
        vpmovzxwq       ymm0{k7}, xmmword ptr [eax]
+
+       vcvtps2qq       xmm0, xmmword ptr [rax]
+       vcvtps2uqq      xmm0, xmmword ptr [rax]
+       vcvttps2qq      xmm0, xmmword ptr [rax]
+       vcvttps2uqq     xmm0, xmmword ptr [rax]

diff --git a/ld/ChangeLog b/ld/ChangeLog
index c07e442c84a17e7f576919005007fc29e2b0c440..cfadbd43a1c33c3c9b20d6e9fa99f6c83cf5b8e3 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,27 @@
+2018-07-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/23428
+       * testsuite/ld-elf/linux-x86.S: New file.
+       * testsuite/ld-elf/linux-x86.exp: Likewise.
+       * testsuite/ld-elf/pr23428.c: Likewise.
+       * testsuite/ld-elf/sec64k.exp: Pass "-z noseparate-code" to ld
+       for Linux/x86 targets.
+       * testsuite/ld-i386/abs-iamcu.d: Likewise.
+       * testsuite/ld-i386/abs.d: Likewise.
+       * testsuite/ld-i386/pr12718.d: Likewise.
+       * testsuite/ld-i386/pr12921.d: Likewise.
+       * testsuite/ld-x86-64/abs-k1om.d: Likewise.
+       * testsuite/ld-x86-64/abs-l1om.d: Likewise.
+       * testsuite/ld-x86-64/abs.d: Likewise.
+       * testsuite/ld-x86-64/pr12718.d: Likewise.
+       * testsuite/ld-x86-64/pr12921.d: Likewise.
+       * testsuite/ld-linkonce/zeroeh.ld: Discard .note.gnu.property
+       section.
+       * testsuite/ld-scripts/print-memory-usage.t: Likewise.
+       * testsuite/ld-scripts/size-2.t: Likewise.
+       * testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Use ld to
+       create executable if language is "asm".
+
 2018-07-18  Nick Clifton  <nickc@redhat.com>
 
        2.31.1 Release point.

diff --git a/ld/testsuite/ld-elf/linux-x86.S b/ld/testsuite/ld-elf/linux-x86.S
new file mode 100644 (file)
index 0000000..bdf40c6
--- /dev/null
+++ b/ld/testsuite/ld-elf/linux-x86.S
@@ -0,0 +1,63 @@
+       .text
+       .globl _start
+       .type _start,@function
+       .p2align 4
+_start:
+       xorl %ebp, %ebp
+#ifdef __LP64__
+       popq %rdi
+       movq %rsp, %rsi
+       andq  $~15, %rsp
+#elif defined __x86_64__
+       mov (%rsp),%edi
+       addl $4,%esp
+       movl %esp, %esi
+       andl  $~15, %esp
+#else
+       popl %esi
+       movl %esp, %ecx
+       andl  $~15, %esp
+
+       subl $8,%esp
+       pushl %ecx
+       pushl %esi
+#endif
+
+       call main
+
+       hlt
+
+       .type syscall,  @function
+       .globl syscall
+       .p2align 4
+syscall:
+#ifdef __x86_64__
+       movq %rdi, %rax         /* Syscall number -> rax.  */
+       movq %rsi, %rdi         /* shift arg1 - arg5.  */
+       movq %rdx, %rsi
+       movq %rcx, %rdx
+       movq %r8, %r10
+       movq %r9, %r8
+       movq 8(%rsp),%r9        /* arg6 is on the stack.  */
+       syscall                 /* Do the system call.  */
+#else
+       push %ebp
+       push %edi
+       push %esi
+       push %ebx
+       mov 0x2c(%esp),%ebp
+       mov 0x28(%esp),%edi
+       mov 0x24(%esp),%esi
+       mov 0x20(%esp),%edx
+       mov 0x1c(%esp),%ecx
+       mov 0x18(%esp),%ebx
+       mov 0x14(%esp),%eax
+       int $0x80
+       pop %ebx
+       pop %esi
+       pop %edi
+       pop %ebp
+#endif
+       ret                     /* Return to caller.  */
+       .size syscall, .-syscall
+       .section .note.GNU-stack,"",@progbits

diff --git a/ld/testsuite/ld-elf/linux-x86.exp b/ld/testsuite/ld-elf/linux-x86.exp
new file mode 100644 (file)
index 0000000..36217c6
--- /dev/null
+++ b/ld/testsuite/ld-elf/linux-x86.exp
@@ -0,0 +1,46 @@
+# Expect script for simple native Linux/x86 tests.
+#   Copyright (C) 2018 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+#
+
+# Test very simple native Linux/x86 programs with linux-x86.S.
+if { ![isnative] || [which $CC] == 0 \
+     || (![istarget "i?86-*-linux*"] \
+         && ![istarget "x86_64-*-linux*"] \
+         && ![istarget "amd64-*-linux*"]) } {
+    return
+}
+
+# Add $PLT_CFLAGS if PLT is expected.
+global PLT_CFLAGS
+# Add $NOPIE_CFLAGS and $NOPIE_LDFLAGS if non-PIE is required.
+global NOPIE_CFLAGS NOPIE_LDFLAGS
+
+run_ld_link_exec_tests [list \
+    [list \
+       "Run PR ld/23428 test" \
+       "--no-dynamic-linker -z separate-code" \
+       "" \
+       { linux-x86.S pr23428.c } \
+       "pr23428" \
+       "pass.out" \
+       "$NOPIE_CFLAGS -fno-asynchronous-unwind-tables" \
+       "asm" \
+    ] \
+]

diff --git a/ld/testsuite/ld-elf/pr23428.c b/ld/testsuite/ld-elf/pr23428.c
new file mode 100644 (file)
index 0000000..3631ed7
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr23428.c
@@ -0,0 +1,43 @@
+#include <unistd.h>
+#include <link.h>
+#include <syscall.h>
+
+#define STRING_COMMA_LEN(STR) (STR), (sizeof (STR) - 1)
+
+int
+main (int argc, char **argv)
+{
+  char **ev = &argv[argc + 1];
+  char **evp = ev;
+  ElfW(auxv_t) *av;
+  const ElfW(Phdr) *phdr = NULL;
+  size_t phnum = 0;
+  size_t loadnum = 0;
+  int fd = STDOUT_FILENO;
+  size_t i;
+
+  while (*evp++ != NULL)
+    ;
+
+  av = (ElfW(auxv_t) *) evp;
+
+  for (; av->a_type != AT_NULL; ++av)
+    switch (av->a_type)
+      {
+      case AT_PHDR:
+       phdr = (const void *) av->a_un.a_val;
+       break;
+      case AT_PHNUM:
+       phnum = av->a_un.a_val;
+       break;
+      }
+
+  for (i = 0; i < phnum; i++, phdr++)
+    if (phdr->p_type == PT_LOAD)
+      loadnum++;
+
+  syscall (SYS_write, fd, STRING_COMMA_LEN ("PASS\n"));
+
+  syscall (SYS_exit, !loadnum);
+  return 0;
+}

diff --git a/ld/testsuite/ld-elf/sec64k.exp b/ld/testsuite/ld-elf/sec64k.exp
index b58139e9dda3ef21335b383e1b7fd092f35bcdb6..3909c0eaa146b581cb249914d175c00525fe97f5 100644 (file)
--- a/ld/testsuite/ld-elf/sec64k.exp
+++ b/ld/testsuite/ld-elf/sec64k.exp
@@ -177,6 +177,8 @@ if { ![istarget "d10v-*-*"]
     foreach sfile $sfiles { puts $ofd "#source: $sfile" }
     if { [istarget spu*-*-*] } {
        puts $ofd "#ld: --local-store 0:0"
+    } elseif { [istarget "i?86-*-linux*"] || [istarget "x86_64-*-linux*"] } {
+       puts $ofd "#ld: -z noseparate-code"
     } else {
        puts $ofd "#ld:"
     }

diff --git a/ld/testsuite/ld-i386/abs-iamcu.d b/ld/testsuite/ld-i386/abs-iamcu.d
index ac9beff2e52dcaad95db6ffc5e98d02951a7d95c..aba7d6b03f5c92801bf151d0316c7cda26e36dcc 100644 (file)
--- a/ld/testsuite/ld-i386/abs-iamcu.d
+++ b/ld/testsuite/ld-i386/abs-iamcu.d
@@ -2,7 +2,7 @@
 #source: abs.s
 #source: zero.s
 #as: --32 -march=iamcu
-#ld: -m elf_iamcu
+#ld: -m elf_iamcu -z noseparate-code
 #objdump: -rs -j .text
 
 .*:     file format .*

diff --git a/ld/testsuite/ld-i386/abs.d b/ld/testsuite/ld-i386/abs.d
index e660aca5246212686c5ed73866d73f6d64837e67..191ee4456ad8b1a267a8534ce9f0df1b9997e169 100644 (file)
--- a/ld/testsuite/ld-i386/abs.d
+++ b/ld/testsuite/ld-i386/abs.d
@@ -2,7 +2,7 @@
 #as: --32
 #source: abs.s
 #source: zero.s
-#ld: -melf_i386
+#ld: -melf_i386 -z noseparate-code
 #objdump: -rs
 
 .*:     file format .*

diff --git a/ld/testsuite/ld-i386/pr12718.d b/ld/testsuite/ld-i386/pr12718.d
index ec51540a421a0c3021ab425d64cf87e6e518ae3a..7eba52d95e8f1209e1df16ae535465f42e83e425 100644 (file)
--- a/ld/testsuite/ld-i386/pr12718.d
+++ b/ld/testsuite/ld-i386/pr12718.d
@@ -1,6 +1,6 @@
 #name: PR ld/12718
 #as: --32
-#ld: -melf_i386
+#ld: -melf_i386 -z noseparate-code
 #readelf: -S
 
 There are 5 section headers, starting at offset 0x[0-9a-f]+:

diff --git a/ld/testsuite/ld-i386/pr12921.d b/ld/testsuite/ld-i386/pr12921.d
index e49079b3c824580aa0df7163521824630ce05eaf..ea2da3eb51ed8f8561facce061e85b6c385fd582 100644 (file)
--- a/ld/testsuite/ld-i386/pr12921.d
+++ b/ld/testsuite/ld-i386/pr12921.d
@@ -1,6 +1,6 @@
 #name: PR ld/12921
 #as: --32
-#ld: -melf_i386
+#ld: -melf_i386 -z noseparate-code
 #readelf: -S --wide
 
 There are 7 section headers, starting at offset 0x[0-9a-f]+:

diff --git a/ld/testsuite/ld-linkonce/zeroeh.ld b/ld/testsuite/ld-linkonce/zeroeh.ld
index b22eaa12c9c700d2beb5e78d0bbac02e216f923c..f89855a08f9b5d7fe094db57cda42bbdc77ea34e 100644 (file)
--- a/ld/testsuite/ld-linkonce/zeroeh.ld
+++ b/ld/testsuite/ld-linkonce/zeroeh.ld
@@ -2,4 +2,5 @@ SECTIONS {
  .text 0xa00 : { *(.text); *(.gnu.linkonce.t.*) }
  .gcc_except_table 0x2000 : { *(.gcc_except_table) }
  .eh_frame 0x4000 : { *(.eh_frame) }
+  /DISCARD/ : { *(.note.gnu.property) }
 }

diff --git a/ld/testsuite/ld-scripts/print-memory-usage.t b/ld/testsuite/ld-scripts/print-memory-usage.t
index 5ff057a5e30f07f9a20a8e1392be96818ba5aad4..6eda1d2dc495451dc5dc78965ca92f2f83b57a40 100644 (file)
--- a/ld/testsuite/ld-scripts/print-memory-usage.t
+++ b/ld/testsuite/ld-scripts/print-memory-usage.t
@@ -11,4 +11,6 @@ SECTIONS
     *(.data)
     *(.rw)
   }
+
+  /DISCARD/ : { *(.note.gnu.property) }
 }

diff --git a/ld/testsuite/ld-scripts/size-2.t b/ld/testsuite/ld-scripts/size-2.t
index 723863995e1a31ed5e4752918e71e00ec714de0e..c3c4eddab4c2422a7fb7f296083bf0ee2bc2d472 100644 (file)
--- a/ld/testsuite/ld-scripts/size-2.t
+++ b/ld/testsuite/ld-scripts/size-2.t
@@ -18,4 +18,5 @@ SECTIONS
     LONG (SIZEOF (.tdata))
     LONG (SIZEOF (.tbss))
   } :image
+  /DISCARD/ : { *(.note.gnu.property) }
 }

diff --git a/ld/testsuite/ld-x86-64/abs-k1om.d b/ld/testsuite/ld-x86-64/abs-k1om.d
index 2c26639fc08e449e6b2b5772b0ac9e6ab09e2daa..6b0fde0eed8f6fc65fe6331f85dd7ac1ef2fefaa 100644 (file)
--- a/ld/testsuite/ld-x86-64/abs-k1om.d
+++ b/ld/testsuite/ld-x86-64/abs-k1om.d
@@ -2,7 +2,7 @@
 #source: ../ld-i386/abs.s
 #source: ../ld-i386/zero.s
 #as: --64 -march=k1om
-#ld: -m elf_k1om
+#ld: -m elf_k1om -z noseparate-code
 #objdump: -rs -j .text
 
 .*:     file format .*

diff --git a/ld/testsuite/ld-x86-64/abs-l1om.d b/ld/testsuite/ld-x86-64/abs-l1om.d
index 1fb96d44b7fbf22f1942fd31a7b8f2aabf472046..f87869f9d046faa8b92dc303836c6c95591865e8 100644 (file)
--- a/ld/testsuite/ld-x86-64/abs-l1om.d
+++ b/ld/testsuite/ld-x86-64/abs-l1om.d
@@ -2,7 +2,7 @@
 #source: ../ld-i386/abs.s
 #source: ../ld-i386/zero.s
 #as: --64 -march=l1om
-#ld: -m elf_l1om
+#ld: -m elf_l1om -z noseparate-code
 #objdump: -rs -j .text
 #target: x86_64-*-linux*
 

diff --git a/ld/testsuite/ld-x86-64/abs.d b/ld/testsuite/ld-x86-64/abs.d
index b24b018639ec542a91eec6dba54e131d81a43503..d99ab4685d06264eb5eb98c69c9ef3b6690f35b9 100644 (file)
--- a/ld/testsuite/ld-x86-64/abs.d
+++ b/ld/testsuite/ld-x86-64/abs.d
@@ -1,7 +1,7 @@
 #name: Absolute non-overflowing relocs
 #source: ../ld-i386/abs.s
 #source: ../ld-i386/zero.s
-#ld:
+#ld: -z noseparate-code
 #objdump: -rs
 
 .*:     file format .*

diff --git a/ld/testsuite/ld-x86-64/pr12718.d b/ld/testsuite/ld-x86-64/pr12718.d
index 07d17325d0413460a3b51a94cf21f0743f365c5e..2c503ffbaae70aba0f9885d57ce47fb5b8dd2c95 100644 (file)
--- a/ld/testsuite/ld-x86-64/pr12718.d
+++ b/ld/testsuite/ld-x86-64/pr12718.d
@@ -1,6 +1,6 @@
 #name: PR ld/12718
 #as: --64
-#ld: -melf_x86_64
+#ld: -melf_x86_64 -z noseparate-code
 #readelf: -S --wide
 
 There are 5 section headers, starting at offset 0x[0-9a-f]+:

diff --git a/ld/testsuite/ld-x86-64/pr12921.d b/ld/testsuite/ld-x86-64/pr12921.d
index 6fe6abee095c33a1b31b99b41419e24be9be2697..1162d55818ea9d6bce84a87c1021d2941bd6fc1a 100644 (file)
--- a/ld/testsuite/ld-x86-64/pr12921.d
+++ b/ld/testsuite/ld-x86-64/pr12921.d
@@ -1,6 +1,6 @@
 #name: PR ld/12921
 #as: --64
-#ld: -melf_x86_64
+#ld: -melf_x86_64 -z noseparate-code
 #readelf: -S --wide
 
 There are 7 section headers, starting at offset 0x[0-9a-f]+:

diff --git a/ld/testsuite/lib/ld-lib.exp b/ld/testsuite/lib/ld-lib.exp
index cfbefe9028e03598b7e071a1bf27c0bc7f5de76c..109509188200cf8220da0a347f00c89488590345 100644 (file)
--- a/ld/testsuite/lib/ld-lib.exp
+++ b/ld/testsuite/lib/ld-lib.exp
@@ -1482,7 +1482,10 @@ proc run_ld_link_exec_tests { ldtests args } {
            continue
        }
 
-       if { [ string match "c++" $lang ] } {
+       if { [ string match "asm" $lang ] } {
+           set link_proc ld_link
+           set link_cmd $ld
+       } elseif { [ string match "c++" $lang ] } {
            set link_proc ld_link
            set link_cmd $CXX
        } else {

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d04963a9fa18936a3117f5b366f8007458277cff..25ddce1378e8ff800c607cfab5e7f489cc628246 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,19 @@
+2018-07-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/23418
+       * i386-opc.h (Byte): Update comments.
+       (Word): Likewise.
+       (Dword): Likewise.
+       (Fword): Likewise.
+       (Qword): Likewise.
+       (Tbyte): Likewise.
+       (Xmmword): Likewise.
+       (Ymmword): Likewise.
+       (Zmmword): Likewise.
+       * i386-opc.tbl: Split vcvtps2qq, vcvtps2uqq, vcvttps2qq and
+       vcvttps2uqq.
+       * i386-tbl.h: Regenerated.
+
 2018-07-18  Nick Clifton  <nickc@redhat.com>
 
        2.31.1 Release point.

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 9a22b3c95f5fb85543ab5e0ea633d5cd41365429..f43b5e11eb27c4bfb1fd849f7e607c242a65c2ed 100644 (file)
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -736,23 +736,23 @@ enum
   RegMem,
   /* Memory.  */
   Mem,
-  /* BYTE memory. */
+  /* BYTE size. */
   Byte,
-  /* WORD memory. 2 byte */
+  /* WORD size. 2 byte */
   Word,
-  /* DWORD memory. 4 byte */
+  /* DWORD size. 4 byte */
   Dword,
-  /* FWORD memory. 6 byte */
+  /* FWORD size. 6 byte */
   Fword,
-  /* QWORD memory. 8 byte */
+  /* QWORD size. 8 byte */
   Qword,
-  /* TBYTE memory. 10 byte */
+  /* TBYTE size. 10 byte */
   Tbyte,
-  /* XMMWORD memory. */
+  /* XMMWORD size. */
   Xmmword,
-  /* YMMWORD memory. */
+  /* YMMWORD size. */
   Ymmword,
-  /* ZMMWORD memory.  */
+  /* ZMMWORD size.  */
   Zmmword,
   /* Unspecified memory size.  */
   Unspecified,

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index fad588ae3ffbfce0db3abb139eb4186b58b321d5..84ade356666d41cafddabe2a205f4e74e5857999 100644 (file)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -5408,11 +5408,13 @@ vcvtpd2uqq, 2, 0x6679, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=3|Masking=3|
 vcvtpd2uqq, 3, 0x6679, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { Imm8, RegZMM, RegZMM }
 
 vcvtps2qq, 2, 0x667B, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|Dword|YMMword|Unspecified|BaseIndex, RegZMM }
-vcvtps2qq, 2, 0x667B, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
+vcvtps2qq, 2, 0x667B, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM }
+vcvtps2qq, 2, 0x667B, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Qword|Unspecified|BaseIndex, RegXMM }
 vcvtps2qq, 2, 0x667B, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|XMMword|Unspecified|BaseIndex, RegYMM }
 vcvtps2qq, 3, 0x667B, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { Imm8, RegYMM, RegZMM }
 vcvtps2uqq, 2, 0x6679, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|Dword|YMMword|Unspecified|BaseIndex, RegZMM }
-vcvtps2uqq, 2, 0x6679, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
+vcvtps2uqq, 2, 0x6679, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM }
+vcvtps2uqq, 2, 0x6679, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Qword|Unspecified|BaseIndex, RegXMM }
 vcvtps2uqq, 2, 0x6679, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|XMMword|Unspecified|BaseIndex, RegYMM }
 vcvtps2uqq, 3, 0x6679, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { Imm8, RegYMM, RegZMM }
 
@@ -5442,11 +5444,13 @@ vcvttpd2uqq, 2, 0x6678, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=3|Masking=3
 vcvttpd2uqq, 3, 0x6678, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, RegZMM, RegZMM }
 
 vcvttps2qq, 2, 0x667A, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|Dword|YMMword|Unspecified|BaseIndex, RegZMM }
-vcvttps2qq, 2, 0x667A, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
+vcvttps2qq, 2, 0x667A, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM }
+vcvttps2qq, 2, 0x667A, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Qword|Unspecified|BaseIndex, RegXMM }
 vcvttps2qq, 2, 0x667A, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|XMMword|Unspecified|BaseIndex, RegYMM }
 vcvttps2qq, 3, 0x667A, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, RegYMM, RegZMM }
 vcvttps2uqq, 2, 0x6678, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|Dword|YMMword|Unspecified|BaseIndex, RegZMM }
-vcvttps2uqq, 2, 0x6678, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
+vcvttps2uqq, 2, 0x6678, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM }
+vcvttps2uqq, 2, 0x6678, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Qword|Unspecified|BaseIndex, RegXMM }
 vcvttps2uqq, 2, 0x6678, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|XMMword|Unspecified|BaseIndex, RegYMM }
 vcvttps2uqq, 3, 0x6678, None, 1, CpuAVX512DQ, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, RegYMM, RegZMM }
 

diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index d513275debddfbe56c9e84507b194cfcd4fcbf59..5c37eea6d7c09216c549939c893078ab7baeb086 100644 (file)
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -87881,6 +87881,23 @@ const insn_template i386_optab[] =
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0 } } } },
+  { "vcvtps2qq", 2, 0x667B, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 1, 0, 0, 0, 0, 0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } } } },
   { "vcvtps2qq", 2, 0x667B, None, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
@@ -87892,8 +87909,8 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 2, 3, 1, 0, 0, 3, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -87952,6 +87969,23 @@ const insn_template i386_optab[] =
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0 } } } },
+  { "vcvtps2uqq", 2, 0x6679, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 1, 0, 0, 0, 0, 0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } } } },
   { "vcvtps2uqq", 2, 0x6679, None, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
@@ -87963,8 +87997,8 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 2, 3, 1, 0, 0, 3, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -88412,6 +88446,23 @@ const insn_template i386_optab[] =
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0 } } } },
+  { "vcvttps2qq", 2, 0x667A, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 1, 0, 0, 0, 0, 0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } } } },
   { "vcvttps2qq", 2, 0x667A, None, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
@@ -88423,8 +88474,8 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 2, 3, 1, 0, 0, 3, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
@@ -88483,6 +88534,23 @@ const insn_template i386_optab[] =
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0 } } } },
+  { "vcvttps2uqq", 2, 0x6678, None, 1,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 1, 0, 0, 0, 0, 0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } },
+      { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
+         0, 0, 0 } } } },
   { "vcvttps2uqq", 2, 0x6678, None, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
@@ -88494,8 +88562,8 @@ const insn_template i386_optab[] =
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 2, 3, 1, 0, 0, 3, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
-         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0,
+    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
+         0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0,
          0, 0, 0 } },
       { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
          0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,

diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index ef75e38e7e155816c809f12a59198a4ebbd28d79..d8a9cce1e27bd58c84b0833909156752f2b54ef4 100644 (file)
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -1126,7 +1126,7 @@ e561 tbeginc SIL_RDU "constrained transaction begin" zEC12 zarch htm
 b2f8 tend S_00 "transaction end" zEC12 zarch htm
 c7 bpp SMI_U0RDP "branch prediction preload" zEC12 zarch
 c5 bprp MII_UPP "branch prediction relative preload" zEC12 zarch
-b2e8 ppa RRF_U0RR "perform processor assist" zEC12 zarch
+b2e8 ppa RRF_U0RR "perform processor assist" zEC12 zarch htm
 b2fa niai IE_UU "next instruction access intent" zEC12 zarch
 b98f crdte RRF_RURR2 "compare and replace DAT table entry" zEC12 zarch optparm
 e3000000009f lat RXY_RRRD "load and trap 32 bit" zEC12 zarch