_mips_configure_fpu

Gbp-Pq: Name 2017_mips_configure_fpu.patch

diff --git a/deps/v8/src/base/cpu.cc b/deps/v8/src/base/cpu.cc
index 6ab0ffee29ee5a2c2a60cd10b9bd4d7d77f09523..37026cde4fc3f8f7d2291a522220b176d75d5aaf 100644 (file)
--- a/deps/v8/src/base/cpu.cc
+++ b/deps/v8/src/base/cpu.cc
@@ -137,22 +137,11 @@ static uint32_t ReadELFHWCaps() {
 
 #if V8_HOST_ARCH_MIPS
 int __detect_fp64_mode(void) {
-  double result = 0;
-  // Bit representation of (double)1 is 0x3FF0000000000000.
-  __asm__ volatile(
-      ".set push\n\t"
-      ".set noreorder\n\t"
-      ".set oddspreg\n\t"
-      "lui $t0, 0x3FF0\n\t"
-      "ldc1 $f0, %0\n\t"
-      "mtc1 $t0, $f1\n\t"
-      "sdc1 $f0, %0\n\t"
-      ".set pop\n\t"
-      : "+m"(result)
-      :
-      : "t0", "$f0", "$f1", "memory");
-
-  return !(result == 1);
+#ifdef FPU_MODE_FP64
+  return 1;
+#else
+  return 0;
+#endif
 }