#include <xen/init.h>
#include <xen/mm.h>
#include <xen/irq.h>
+#include <xen/iocap.h>
#include <xen/sched.h>
#include <xen/errno.h>
#include <xen/softirq.h>
csize, vsize);
}
+static int gicv2_iomem_deny_access(const struct domain *d)
+{
+ int rc;
+ unsigned long gfn, nr;
+
+ gfn = dbase >> PAGE_SHIFT;
+ rc = iomem_deny_access(d, gfn, gfn + 1);
+ if ( rc )
+ return rc;
+
+ gfn = hbase >> PAGE_SHIFT;
+ rc = iomem_deny_access(d, gfn, gfn + 1);
+ if ( rc )
+ return rc;
+
+ gfn = cbase >> PAGE_SHIFT;
+ nr = DIV_ROUND_UP(csize, PAGE_SIZE);
+ rc = iomem_deny_access(d, gfn, gfn + nr);
+ if ( rc )
+ return rc;
+
+ gfn = vbase >> PAGE_SHIFT;
+ return iomem_deny_access(d, gfn, gfn + nr);
+}
+
#ifdef CONFIG_ACPI
static int gicv2_make_hwdom_madt(const struct domain *d, u32 offset)
{
.read_apr = gicv2_read_apr,
.make_hwdom_dt_node = gicv2_make_hwdom_dt_node,
.make_hwdom_madt = gicv2_make_hwdom_madt,
+ .iomem_deny_access = gicv2_iomem_deny_access,
};
/* Set up the GIC */
#include <xen/cpu.h>
#include <xen/mm.h>
#include <xen/irq.h>
+#include <xen/iocap.h>
#include <xen/sched.h>
#include <xen/errno.h>
#include <xen/delay.h>
&vbase, &vsize);
}
+static int gicv3_iomem_deny_access(const struct domain *d)
+{
+ int rc, i;
+ unsigned long gfn, nr;
+
+ gfn = dbase >> PAGE_SHIFT;
+ nr = DIV_ROUND_UP(SZ_64K, PAGE_SIZE);
+ rc = iomem_deny_access(d, gfn, gfn + nr);
+ if ( rc )
+ return rc;
+
+ for ( i = 0; i < gicv3.rdist_count; i++ )
+ {
+ gfn = gicv3.rdist_regions[i].base >> PAGE_SHIFT;
+ nr = DIV_ROUND_UP(gicv3.rdist_regions[i].size, PAGE_SIZE);
+ rc = iomem_deny_access(d, gfn, gfn + nr);
+ if ( rc )
+ return rc;
+ }
+
+ if ( cbase != INVALID_PADDR )
+ {
+ gfn = cbase >> PAGE_SHIFT;
+ nr = DIV_ROUND_UP(csize, PAGE_SIZE);
+ rc = iomem_deny_access(d, gfn, gfn + nr);
+ if ( rc )
+ return rc;
+ }
+
+ if ( vbase != INVALID_PADDR )
+ {
+ gfn = vbase >> PAGE_SHIFT;
+ nr = DIV_ROUND_UP(csize, PAGE_SIZE);
+ return iomem_deny_access(d, gfn, gfn + nr);
+ }
+
+ return 0;
+}
+
#ifdef CONFIG_ACPI
static int gicv3_make_hwdom_madt(const struct domain *d, u32 offset)
{
.secondary_init = gicv3_secondary_cpu_init,
.make_hwdom_dt_node = gicv3_make_hwdom_dt_node,
.make_hwdom_madt = gicv3_make_hwdom_madt,
+ .iomem_deny_access = gicv3_iomem_deny_access,
};
static int __init gicv3_dt_preinit(struct dt_device_node *node, const void *data)
return gic_hw_ops->make_hwdom_madt(d, offset);
}
+int gic_iomem_deny_access(const struct domain *d)
+{
+ return gic_hw_ops->iomem_deny_access(d);
+}
+
/*
* Local variables:
* mode: C
const struct dt_device_node *gic, void *fdt);
/* Create MADT table for the hardware domain */
int (*make_hwdom_madt)(const struct domain *d, u32 offset);
+ /* Deny access to GIC regions */
+ int (*iomem_deny_access)(const struct domain *d);
};
void register_gic_ops(const struct gic_hw_operations *ops);
const struct dt_device_node *gic,
void *fdt);
int gic_make_hwdom_madt(const struct domain *d, u32 offset);
+int gic_iomem_deny_access(const struct domain *d);
#endif /* __ASSEMBLY__ */
#endif