s->irr &= ~(1 << irq);
}
-int pic_read_irq(struct hvm_virpic *s)
+static int pic_read_irq(struct hvm_virpic *s)
{
int irq, irq2, intno;
unsigned long flags;
pic_intack(&s->pics[1], irq2);
} else {
/* spurious IRQ on slave controller */
+ gdprintk(XENLOG_WARNING, "Spurious irq on slave i8259.\n");
irq2 = 7;
}
intno = s->pics[1].irq_base + irq2;
/* spurious IRQ on host controller */
irq = 7;
intno = s->pics[0].irq_base + irq;
+ gdprintk(XENLOG_WARNING, "Spurious irq on master i8259.\n");
}
pic_update_irq(s);
spin_unlock_irqrestore(&s->lock, flags);
-
+
return intno;
}
return ret;
}
-/* memory mapped interrupt status */
-/* XXX: may be the same than pic_read_rq() */
-uint32_t pic_intack_read(struct hvm_virpic *s)
-{
- int ret;
- unsigned long flags;
-
- spin_lock_irqsave(&s->lock, flags);
- ret = pic_poll_read(&s->pics[0], 0x00);
- if (ret == 2)
- ret = pic_poll_read(&s->pics[1], 0x80) + 8;
- /* Prepare for ISR read */
- s->pics[0].read_reg_select = 1;
- spin_unlock_irqrestore(&s->lock, flags);
-
- return ret;
-}
-
static void elcr_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
PicState *s = opaque;
void pic_init(struct hvm_virpic *s,
void (*irq_request)(void *, int),
void *irq_request_opaque);
-int pic_read_irq(struct hvm_virpic *s);
void pic_update_irq(struct hvm_virpic *s); /* Caller must hold s->lock */
-uint32_t pic_intack_read(struct hvm_virpic *s);
void register_pic_io_hook (void);
int cpu_get_pic_interrupt(struct vcpu *v, int *type);
int is_periodic_irq(struct vcpu *v, int irq, int type);