This a step forward to fix the security hole introduced by dom0's 1:1
mapping VT-d table: remove the critical code and data from it. The
more flexible solution is to update dom0's VT-d table on demand as what
will be done for other PV domains. However, there could bring a
performance issue even with software optimization. Iotlb flush of some
hardware is time-consuming.
Signed-off-by: Yang, Xiaowei <xiaowei.yang@intel.com>
#endif
}
+int xen_in_range(unsigned long start, unsigned long end)
+{
+ start = max_t(unsigned long, start, xenheap_phys_start);
+ end = min_t(unsigned long, end, xenheap_phys_end);
+
+ return start < end;
+}
+
/*
* Local variables:
* mode: C
return (g_tboot_shared != NULL);
}
+int tboot_in_range(unsigned long start, unsigned long end)
+{
+ if ( g_tboot_shared == NULL || g_tboot_shared->version < 0x02 )
+ return 0;
+
+ start = max_t(unsigned long, start, g_tboot_shared->tboot_base);
+ end = min_t(unsigned long, end,
+ g_tboot_shared->tboot_base + g_tboot_shared->tboot_size);
+
+ return start < end;
+}
+
/*
* Local variables:
* mode: C
if ( d->domain_id == 0 )
{
- /* Set up 1:1 page table for dom0. */
+ extern int xen_in_range(unsigned long start, unsigned long end);
+ extern int tboot_in_range(unsigned long start, unsigned long end);
+
+ /*
+ * Set up 1:1 page table for dom0 except the critical segments
+ * like Xen and tboot.
+ */
for ( i = 0; i < max_page; i++ )
+ {
+ if ( xen_in_range(i << PAGE_SHIFT_4K, (i + 1) << PAGE_SHIFT_4K) ||
+ tboot_in_range(i << PAGE_SHIFT_4K, (i + 1) << PAGE_SHIFT_4K) )
+ continue;
+
iommu_map_page(d, i, i);
+ }
setup_dom0_devices(d);
setup_dom0_rmrr(d);