--- /dev/null
+From: Ryan Pavlik <ryan.pavlik@collabora.com>
+Date: Tue, 19 Jan 2021 13:46:43 -0600
+Subject: Restricts cpu yield instructions a little.
+
+adding clobber for ARM and preventing older 32 bits chips not supporting this instruction.
+
+Backport of https://github.com/microsoft/mimalloc/commit/33a10b48605f8bb419487a03125815ad6ee00a70
+---
+ extlib/mimalloc/include/mimalloc-atomic.h | 12 +++++++++---
+ 1 file changed, 9 insertions(+), 3 deletions(-)
+
+diff --git a/extlib/mimalloc/include/mimalloc-atomic.h b/extlib/mimalloc/include/mimalloc-atomic.h
+index 722b6ad..94010d4 100644
+--- a/extlib/mimalloc/include/mimalloc-atomic.h
++++ b/extlib/mimalloc/include/mimalloc-atomic.h
+@@ -267,16 +267,22 @@ static inline void mi_atomic_maxi64(volatile int64_t* p, int64_t x) {
+ std::this_thread::yield();
+ }
+ #elif (defined(__GNUC__) || defined(__clang__)) && \
+- (defined(__x86_64__) || defined(__i386__) || defined(__arm__) || defined(__aarch64__))
++ (defined(__x86_64__) || defined(__i386__) || (defined(__arm__) && __ARM_ARCH__ >= 7) || defined(__aarch64__))
+ #if defined(__x86_64__) || defined(__i386__)
+ static inline void mi_atomic_yield(void) {
+ asm volatile ("pause" ::: "memory");
+ }
+-#elif defined(__arm__) || defined(__aarch64__)
++#elif (defined(__arm__) && __ARM_ARCH__ >= 7) || defined(__aarch64__)
+ static inline void mi_atomic_yield(void) {
+- asm volatile("yield");
++ __asm__ volatile("yield" ::: "memory");
+ }
+ #endif
++#elif defined(__sun)
++ // Fallback for other archs
++ #include <synch.h>
++ static inline void mi_atomic_yield(void) {
++ smt_pause();
++ }
+ #elif defined(__wasi__)
+ #include <sched.h>
+ static inline void mi_atomic_yield(void) {