svm: support EFER.LMSLE for guests

Now that the feature is officially documented (see
http://support.amd.com/us/Processor_TechDocs/24593.pdf), I think it
makes sense to also allow HVM guests to make use of it.

Signed-off-by: Jan Beulich <jbeulich@novell.com>

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 2b2485fe1549f4a1e7225d2a8b11ce9b1e4aad06..4f68f27e9d99baf0ada3b7335771ba81ce7aecdc 100644 (file)
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -590,6 +590,7 @@ static bool_t hvm_efer_valid(uint64_t value, uint64_t efer_validbits)
              ((sizeof(long) != 8) && (value & EFER_LME)) ||
              (!cpu_has_nx && (value & EFER_NX)) ||
              (!cpu_has_syscall && (value & EFER_SCE)) ||
+             (!cpu_has_lmsl && (value & EFER_LMSLE)) ||
              (!cpu_has_ffxsr && (value & EFER_FFXSE)) ||
              ((value & (EFER_LME|EFER_LMA)) == EFER_LMA));
 }
@@ -641,7 +642,8 @@ static int hvm_load_cpu_ctxt(struct domain *d, hvm_domain_context_t *h)
     }
 
     if ( !hvm_efer_valid(
-        ctxt.msr_efer, EFER_FFXSE | EFER_LME | EFER_LMA | EFER_NX | EFER_SCE) )
+        ctxt.msr_efer,
+        EFER_FFXSE | EFER_LMSLE | EFER_LME | EFER_LMA | EFER_NX | EFER_SCE) )
     {
         gdprintk(XENLOG_ERR, "HVM restore: bad EFER 0x%"PRIx64"\n",
                  ctxt.msr_efer);
@@ -995,7 +997,8 @@ int hvm_set_efer(uint64_t value)
 
     value &= ~EFER_LMA;
 
-    if ( !hvm_efer_valid(value, EFER_FFXSE | EFER_LME | EFER_NX | EFER_SCE) )
+    if ( !hvm_efer_valid(value,
+            EFER_FFXSE | EFER_LMSLE | EFER_LME | EFER_NX | EFER_SCE) )
     {
         gdprintk(XENLOG_WARNING, "Trying to set reserved bit in "
                  "EFER: %"PRIx64"\n", value);

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index d753a434ae1e26bd978a91d6cf384418c49cda04..1f527a8222b2b358e9608acdb8d4bfda13e23f0e 100644 (file)
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -57,6 +57,9 @@
 
 u32 svm_feature_flags;
 
+/* Indicates whether guests may use EFER.LMSLE. */
+bool_t cpu_has_lmsl;
+
 #define set_segment_register(name, value)  \
     asm volatile ( "movw %%ax ,%%" STR(name) "" : : "a" (value) )
 
@@ -848,6 +851,29 @@ static int svm_cpu_up(struct cpuinfo_x86 *c)
     /* Initialize core's ASID handling. */
     svm_asid_init(c);
 
+#ifdef __x86_64__
+    /*
+     * Check whether EFER.LMSLE can be written.
+     * Unfortunately there's no feature bit defined for this.
+     */
+    eax = read_efer();
+    edx = read_efer() >> 32;
+    if ( wrmsr_safe(MSR_EFER, eax | EFER_LMSLE, edx) == 0 )
+        rdmsr(MSR_EFER, eax, edx);
+    if ( eax & EFER_LMSLE )
+    {
+        if ( c == &boot_cpu_data )
+            cpu_has_lmsl = 1;
+        wrmsr(MSR_EFER, eax ^ EFER_LMSLE, edx);
+    }
+    else
+    {
+        if ( cpu_has_lmsl )
+            printk(XENLOG_WARNING "Inconsistent LMLSE support across CPUs!\n");
+        cpu_has_lmsl = 0;
+    }
+#endif
+
     return 1;
 }
 

diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h
index f52a26c2cd087b94b933f443a9d2f4658387842f..23770f6a017b8681120bf46e0c5b17a9e758153d 100644 (file)
--- a/xen/include/asm-x86/hvm/hvm.h
+++ b/xen/include/asm-x86/hvm/hvm.h
@@ -135,6 +135,7 @@ struct hvm_function_table {
 
 extern struct hvm_function_table hvm_funcs;
 extern int hvm_enabled;
+extern bool_t cpu_has_lmsl;
 
 int hvm_domain_initialise(struct domain *d);
 void hvm_domain_relinquish_resources(struct domain *d);