xen/x86: Avoid undefined behaviour by shifting into a sign bit
authorAndrew Cooper <andrew.cooper3@citrix.com>
Fri, 5 Aug 2016 13:24:01 +0000 (14:24 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 11 Aug 2016 09:09:01 +0000 (10:09 +0100)
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/apic.c
xen/arch/x86/cpu/common.c
xen/arch/x86/x86_64/traps.c
xen/include/asm-x86/apicdef.h

index f3727cdc2841441dc6c625a4bbd7fb1ad139e04e..3fb9a826c71af05e6a8b0b9aac1e8e95a2499f7f 100644 (file)
@@ -571,7 +571,7 @@ void setup_local_APIC(void)
     for (i = APIC_ISR_NR - 1; i >= 0; i--) {
         value = apic_read(APIC_ISR + i*0x10);
         for (j = 31; j >= 0; j--) {
-            if (value & (1<<j))
+            if (value & (1u << j))
                 ack_APIC_irq();
         }
     }
index 2c4758917e214929384de5c640aa483699271a54..577a01fe53b4879e0326d240e056740e161fa004 100644 (file)
@@ -476,7 +476,7 @@ void detect_extended_topology(struct cpuinfo_x86 *c)
                sub_index++;
        } while ( LEAFB_SUBTYPE(ecx) != INVALID_TYPE );
 
-       core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
+       core_select_mask = (~(~0u << core_plus_mask_width)) >> ht_mask_width;
 
        c->cpu_core_id = phys_pkg_id(initial_apicid, ht_mask_width)
                & core_select_mask;
index 19f58a10cc70276bb85c0d3a150c0a4d43d4ff76..2d8ecf54f8d81992540a63b211afc4c76f20b898 100644 (file)
@@ -414,7 +414,7 @@ void subarch_percpu_traps_init(void)
     unmap_domain_page(stub_page);
 
     /* Common SYSCALL parameters. */
-    wrmsr(MSR_STAR, 0, (FLAT_RING3_CS32<<16) | __HYPERVISOR_CS);
+    wrmsr(MSR_STAR, 0, ((unsigned int)FLAT_RING3_CS32 << 16) | __HYPERVISOR_CS);
     wrmsr(MSR_SYSCALL_MASK, XEN_SYSCALL_MASK, 0U);
 }
 
index 875228713fe2426ac3ef29d36abda04b27305806..da7f4d38cf6ce93018611de278e4f5a4d226f1c9 100644 (file)
@@ -30,7 +30,7 @@
 #define                        APIC_EIO_ACK            0x0             /* Write this to the EOI register */
 #define                APIC_RRR        0xC0
 #define                APIC_LDR        0xD0
-#define                        APIC_LDR_MASK           (0xFF<<24)
+#define                        APIC_LDR_MASK           (0xFFu<<24)
 #define                        GET_xAPIC_LOGICAL_ID(x) (((x)>>24)&0xFF)
 #define                        SET_xAPIC_LOGICAL_ID(x) (((x)<<24))
 #define                        APIC_ALL_CPUS           0xFF