for (i = APIC_ISR_NR - 1; i >= 0; i--) {
value = apic_read(APIC_ISR + i*0x10);
for (j = 31; j >= 0; j--) {
- if (value & (1<<j))
+ if (value & (1u << j))
ack_APIC_irq();
}
}
sub_index++;
} while ( LEAFB_SUBTYPE(ecx) != INVALID_TYPE );
- core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
+ core_select_mask = (~(~0u << core_plus_mask_width)) >> ht_mask_width;
c->cpu_core_id = phys_pkg_id(initial_apicid, ht_mask_width)
& core_select_mask;
unmap_domain_page(stub_page);
/* Common SYSCALL parameters. */
- wrmsr(MSR_STAR, 0, (FLAT_RING3_CS32<<16) | __HYPERVISOR_CS);
+ wrmsr(MSR_STAR, 0, ((unsigned int)FLAT_RING3_CS32 << 16) | __HYPERVISOR_CS);
wrmsr(MSR_SYSCALL_MASK, XEN_SYSCALL_MASK, 0U);
}
#define APIC_EIO_ACK 0x0 /* Write this to the EOI register */
#define APIC_RRR 0xC0
#define APIC_LDR 0xD0
-#define APIC_LDR_MASK (0xFF<<24)
+#define APIC_LDR_MASK (0xFFu<<24)
#define GET_xAPIC_LOGICAL_ID(x) (((x)>>24)&0xFF)
#define SET_xAPIC_LOGICAL_ID(x) (((x)<<24))
#define APIC_ALL_CPUS 0xFF