* Fixed instruction re-scheduler for ARM in case of PIC.

git-svn-id: http://svn.freepascal.org/svn/ fpc/trunk@31706 3ad0048d-3df7-0310-abae-a5850022a9f2

Gbp-Pq: Name Fixed-instruction-re-scheduler-for-ARM-in-case-of-PIC.patch

diff --git a/fpcsrc/compiler/arm/aoptcpu.pas b/fpcsrc/compiler/arm/aoptcpu.pas
index 43eab3a8628f866a525060b5d6dbc7d7a576cd1a..3fc493195b6b65b3524db62615e0edc3d4e4ed05 100644 (file)
--- a/fpcsrc/compiler/arm/aoptcpu.pas
+++ b/fpcsrc/compiler/arm/aoptcpu.pas
@@ -2500,13 +2500,16 @@ Implementation
               hp3:=tai(p.Previous);
               hp5:=tai(p.next);
               asml.Remove(p);
-              { if there is a reg. dealloc instruction associated with p, move it together with p }
+              { if there is a reg. dealloc instruction or address labels (e.g. for GOT-less PIC)
+                associated with p, move it together with p }
 
               { before the instruction? }
               while assigned(hp3) and (hp3.typ<>ait_instruction) do
                 begin
-                  if (hp3.typ=ait_regalloc) and (tai_regalloc(hp3).ratype in [ra_dealloc]) and
-                    RegInInstruction(tai_regalloc(hp3).reg,p) then
+                  if ( (hp3.typ=ait_regalloc) and (tai_regalloc(hp3).ratype in [ra_dealloc]) and
+                    RegInInstruction(tai_regalloc(hp3).reg,p) )
+                    or ( (hp3.typ=ait_label) and (tai_label(hp3).labsym.typ=AT_ADDR) )
+                  then
                     begin
                       hp4:=hp3;
                       hp3:=tai(hp3.Previous);
@@ -2552,7 +2555,7 @@ Implementation
 {$endif DEBUG_PREREGSCHEDULER}
               asml.InsertBefore(hp1,insertpos);
               asml.InsertListBefore(insertpos,list);
-              p:=tai(p.next)
+              p:=tai(p.next);
             end
           else if p.typ=ait_instruction then
             p:=hp1