[IA64] Fix vga acceleration for VTI domain

Now guest vhpt table of VMX domain is searched to insert some
entry into vtlb on the fly. However previous guard on memory
attribute is only done for guest itc.d emulation. That breaks
VGA acceleration and this patch fixes it by moving check to
right place.

Signed-off-by Kevin Tian <kevin.tian@intel.com>

diff --git a/xen/arch/ia64/vmx/vmmu.c b/xen/arch/ia64/vmx/vmmu.c
index 3a91956b10187b8b551d7017d2c3399fbaea14c9..3df28d1afd744bd061290f9ba56a3405cc1cfcd2 100644 (file)
--- a/xen/arch/ia64/vmx/vmmu.c
+++ b/xen/arch/ia64/vmx/vmmu.c
@@ -373,18 +373,8 @@ IA64FAULT vmx_vcpu_itc_d(VCPU *vcpu, UINT64 pte, UINT64 itir, UINT64 ifa)
     }
 #endif //VTLB_DEBUG
     gpfn = (pte & _PAGE_PPN_MASK)>> PAGE_SHIFT;
-    if (VMX_DOMAIN(vcpu)) {
-        if (__gpfn_is_io(vcpu->domain, gpfn))
-            pte |= VTLB_PTE_IO;
-        else{
-           if ((pte & _PAGE_MA_MASK)!=_PAGE_MA_NAT)
-            /* Ensure WB attribute if pte is related to a normal mem page,
-             * which is required by vga acceleration since qemu maps shared
-             * vram buffer with WB.
-             */
-                pte &= ~_PAGE_MA_MASK;
-       }
-    }
+    if (VMX_DOMAIN(vcpu) && __gpfn_is_io(vcpu->domain, gpfn))
+        pte |= VTLB_PTE_IO;
     thash_purge_and_insert(vcpu, pte, itir, ifa);
     return IA64_NO_FAULT;
 

diff --git a/xen/arch/ia64/vmx/vtlb.c b/xen/arch/ia64/vmx/vtlb.c
index 57466da8c744fd8ae44c380cfb3283763efab4d2..2e038890fe2c13449c1e8722fe2b230286a824ba 100644 (file)
--- a/xen/arch/ia64/vmx/vtlb.c
+++ b/xen/arch/ia64/vmx/vtlb.c
@@ -446,6 +446,13 @@ void thash_purge_and_insert(VCPU *v, u64 pte, u64 itir, u64 ifa)
     ps = itir_ps(itir);
 
     if(VMX_DOMAIN(v)){
+        /* Ensure WB attribute if pte is related to a normal mem page,
+         * which is required by vga acceleration since qemu maps shared
+         * vram buffer with WB.
+         */
+        if (!(pte & VTLB_PTE_IO) && ((pte & _PAGE_MA_MASK) != _PAGE_MA_NAT))
+            pte &= ~_PAGE_MA_MASK;
+
         phy_pte = translate_phy_pte(v, &pte, itir, ifa);
         if(ps==PAGE_SHIFT){
             if(!(pte&VTLB_PTE_IO)){