Merge branch 'arm-next' into staging

diff --cc docs/misc/xen-command-line.markdown
index ff8c7d4c2f4d10dc5af4f23e877b84368984c995,962028b6ed4d52f4138ec6a00b4c43177446997a..8a832c0f8ba946b81c455f1a266283aee210c9df
--- 1/docs/misc/xen-command-line.markdown
--- 2/docs/misc/xen-command-line.markdown
+++ b/docs/misc/xen-command-line.markdown
@@@ -1758,9 -1756,27 +1758,27 @@@ enforces the maximum theoretically nece
  is being interpreted as a custom timeout in milliseconds. Zero or boolean
  false disable the quirk workaround, which is also the default.
  
+ ### spec-ctrl (Arm)
+ > `= List of [ ssbd=force-disable|runtime|force-enable ]`
+ 
+ Controls for speculative execution sidechannel mitigations.
+ 
+ The option `ssbd=` is used to control the state of Speculative Store
+ Bypass Disable (SSBD) mitigation.
+ 
+ * `ssbd=force-disable` will keep the mitigation permanently off. The guest
+ will not be able to control the state of the mitigation.
+ * `ssbd=runtime` will always turn on the mitigation when running in the
+ hypervisor context. The guest will be to turn on/off the mitigation for
+ itself by using the firmware interface ARCH\_WORKAROUND\_2.
+ * `ssbd=force-enable` will keep the mitigation permanently on. The guest will
+ not be able to control the state of the mitigation.
+ 
+ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
+ 
  ### spec-ctrl (x86)
  > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb}=<bool>,
 ->              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd}=<bool> ]`
 +>              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu}=<bool> ]`
  
  Controls for speculative execution sidechannel mitigations.  By default, Xen
  will pick the most appropriate mitigations based on compiled in support,

diff --cc xen/arch/arm/setup.c
Simple merge

diff --cc xen/common/schedule.c
Simple merge