pl011: set baud and clock_hz to the right defaults for Versatile Express
authorStefano Stabellini <stefano.stabellini@eu.citrix.com>
Thu, 15 Nov 2012 10:25:27 +0000 (10:25 +0000)
committerStefano Stabellini <stefano.stabellini@eu.citrix.com>
Thu, 15 Nov 2012 10:25:27 +0000 (10:25 +0000)
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
Committed-by: Ian Campbell <ian.campbell@citrix.com>
xen/drivers/char/pl011.c

index 6af45aa010c806c68435b1636412055ff55d8665..6ccb73ad3322a6934b5df662551b59559e4dad16 100644 (file)
@@ -241,8 +241,8 @@ void __init pl011_init(int index, unsigned long register_base_address)
 
     uart = &pl011_com[index];
 
-    uart->clock_hz  = 7372800;
-    uart->baud      = 115200;
+    uart->clock_hz  = 0x16e3600;
+    uart->baud      = 38400;
     uart->data_bits = 8;
     uart->parity    = PARITY_NONE;
     uart->stop_bits = 1;