[IA64] Let Xen handle identity mapping for xenolinux region 7

During kernel build in dom0, half of the resulting slow reflections
are alt DTLB misses.  Since we know Linux identity maps region 7,
Xen can handle the miss itself.  This reduces the system time component
of the kernel build by nearly 15%.

Signed-off-by: Anthony Xu <anthony.xu@intel.com>

diff --git a/xen/arch/ia64/xen/vcpu.c b/xen/arch/ia64/xen/vcpu.c
index b1524a89f0eb2520979476974c02c478e8aa79ef..9b554b1b64d9885fe73f38ad501ffdc1242f2e82 100644 (file)
--- a/xen/arch/ia64/xen/vcpu.c
+++ b/xen/arch/ia64/xen/vcpu.c
@@ -1682,9 +1682,18 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u64 address, BOOLEAN is_data,
        // note: architecturally, iha is optionally set for alt faults but
        // xenlinux depends on it so should document it as part of PV interface
        vcpu_thash(vcpu, address, iha);
-       if (!(rr & RR_VE_MASK) || !(pta & IA64_PTA_VE))
+       if (!(rr & RR_VE_MASK) || !(pta & IA64_PTA_VE)) {
+               REGS *regs = vcpu_regs(vcpu);
+               // NOTE: This is specific code for linux kernel
+               // We assume region 7 is identity mapped
+               if (region == 7 && ia64_psr(regs)->cpl == 2) {
+                       pte.val = address & _PAGE_PPN_MASK;
+                       pte.val = pte.val | pgprot_val(PAGE_KERNEL);
+                       goto out;
+               }
                return is_data ? IA64_ALT_DATA_TLB_VECTOR :
                        IA64_ALT_INST_TLB_VECTOR;
+       }
 
        /* avoid recursively walking (short format) VHPT */
        if (((address ^ pta) & ((itir_mask(pta) << 3) >> 3)) == 0)
@@ -1704,6 +1713,7 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u64 address, BOOLEAN is_data,
                return is_data ? IA64_DATA_TLB_VECTOR : IA64_INST_TLB_VECTOR;
 
        /* found mapping in guest VHPT! */
+out:
        *itir = rr & RR_PS_MASK;
        *pteval = pte.val;
        perfc_incrc(vhpt_translate);