#include <asm/processor.h>
#include <asm/microcode.h>
-static int verbose;
-boolean_param("microcode.verbose", verbose);
-
const struct microcode_ops *microcode_ops;
static DEFINE_SPINLOCK(microcode_mutex);
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
spin_lock(µcode_mutex);
- microcode_ops->microcode_fini_cpu(cpu);
+ xfree(uci->mc.valid_mc);
+ uci->mc.valid_mc = NULL;
uci->valid = 0;
spin_unlock(µcode_mutex);
}
static void do_microcode_update_one(void *info)
{
- int error;
-
- error = microcode_update_cpu(
+ int error = microcode_update_cpu(
smp_processor_id(), microcode_buffer.buf, microcode_buffer.size);
-
if ( error )
microcode_error = error;
}
static int do_microcode_update(void)
{
- int error = 0;
-
microcode_error = 0;
if ( on_each_cpu(do_microcode_update_one, NULL, 1, 1) != 0 )
{
printk(KERN_ERR "microcode: Error! Could not run on all processors\n");
- error = -EIO;
- goto out;
- }
-
- if ( microcode_error )
- {
- error = microcode_error;
- goto out;
+ return -EIO;
}
- out:
- return error;
+ return microcode_error;
}
int microcode_update(XEN_GUEST_HANDLE(const_void) buf, unsigned long len)
return -E2BIG;
}
- if (microcode_ops == NULL)
+ if ( microcode_ops == NULL )
return -EINVAL;
microcode_buffer.buf = xmalloc_array(uint8_t, len);
return -1;
}
- asm volatile("movl %1, %%ecx; rdmsr"
- : "=a" (csig->rev)
- : "i" (MSR_AMD_PATCHLEVEL) : "ecx");
+ asm volatile (
+ "movl %1, %%ecx; rdmsr"
+ : "=a" (csig->rev)
+ : "i" (MSR_AMD_PATCHLEVEL) : "ecx" );
printk(KERN_INFO "microcode: collect_cpu_info: patch_id=0x%x\n",
csig->rev);
void *new_mc;
unsigned int current_cpu_id;
unsigned int equiv_cpu_id = 0x00;
- unsigned int i = 0;
+ unsigned int i;
/* We should bind the task to the CPU */
BUG_ON(cpu != raw_smp_processor_id());
current_cpu_id = cpuid_eax(0x00000001);
- while ( equiv_cpu_table[i].installed_cpu != 0 )
+ for ( i = 0; equiv_cpu_table[i].installed_cpu != 0; i++ )
{
if ( current_cpu_id == equiv_cpu_table[i].installed_cpu )
{
equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
break;
}
- i++;
}
if ( !equiv_cpu_id )
edx = (uint32_t)(addr >> 32);
eax = (uint32_t)addr;
- asm volatile("movl %0, %%ecx; wrmsr" :
- : "i" (MSR_AMD_PATCHLOADER), "a" (eax), "d" (edx) : "ecx");
+ asm volatile (
+ "movl %0, %%ecx; wrmsr" :
+ : "i" (MSR_AMD_PATCHLOADER), "a" (eax), "d" (edx) : "ecx" );
/* get patch id after patching */
- asm volatile("movl %1, %%ecx; rdmsr"
- : "=a" (rev)
- : "i" (MSR_AMD_PATCHLEVEL) : "ecx");
+ asm volatile (
+ "movl %1, %%ecx; rdmsr"
+ : "=a" (rev)
+ : "i" (MSR_AMD_PATCHLEVEL) : "ecx");
spin_unlock_irqrestore(µcode_update_lock, flags);
return error;
}
-static void microcode_fini_cpu(int cpu)
-{
- struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
-
- xfree(uci->mc.mc_amd);
- uci->mc.mc_amd = NULL;
-}
-
static struct microcode_ops microcode_amd_ops = {
.get_matching_microcode = get_matching_microcode,
- .microcode_sanity_check = NULL,
.cpu_request_microcode = cpu_request_microcode,
.collect_cpu_info = collect_cpu_info,
.apply_microcode = apply_microcode,
- .microcode_fini_cpu = microcode_fini_cpu,
};
static __init int microcode_init_amd(void)
return offset + total_size;
}
-/* fake device for request_firmware */
-extern struct platform_device *microcode_pdev;
-
static int cpu_request_microcode(int cpu, const void *buf, size_t size)
{
long offset = 0;
return error;
}
-static void microcode_fini_cpu(int cpu)
-{
- struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
-
- xfree(uci->mc.mc_intel);
- uci->mc.mc_intel = NULL;
-}
-
static struct microcode_ops microcode_intel_ops = {
.get_matching_microcode = get_matching_microcode,
- .microcode_sanity_check = microcode_sanity_check,
.cpu_request_microcode = cpu_request_microcode,
.collect_cpu_info = collect_cpu_info,
.apply_microcode = apply_microcode,
- .microcode_fini_cpu = microcode_fini_cpu,
};
static __init int microcode_init_intel(void)
struct cpu_signature;
struct microcode_ops {
- long (*microcode_get_next_ucode)(void **mc, long offset);
- int (*get_matching_microcode)(void *mc, int cpu);
- int (*microcode_sanity_check)(void *mc);
- int (*cpu_request_microcode)(int cpu, const void *buf, size_t size);
- int (*collect_cpu_info)(int cpu_num, struct cpu_signature *csig);
- int (*apply_microcode)(int cpu);
- void (*microcode_fini_cpu)(int cpu);
- void (*clear_patch)(void *data);
+ int (*get_matching_microcode)(void *mc, int cpu);
+ int (*cpu_request_microcode)(int cpu, const void *buf, size_t size);
+ int (*collect_cpu_info)(int cpu_num, struct cpu_signature *csig);
+ int (*apply_microcode)(int cpu);
};
struct microcode_header_intel {
- unsigned int hdrver;
- unsigned int rev;
- unsigned int date;
- unsigned int sig;
- unsigned int cksum;
- unsigned int ldrver;
- unsigned int pf;
- unsigned int datasize;
- unsigned int totalsize;
- unsigned int reserved[3];
+ unsigned int hdrver;
+ unsigned int rev;
+ unsigned int date;
+ unsigned int sig;
+ unsigned int cksum;
+ unsigned int ldrver;
+ unsigned int pf;
+ unsigned int datasize;
+ unsigned int totalsize;
+ unsigned int reserved[3];
};
struct microcode_intel {
- struct microcode_header_intel hdr;
- unsigned int bits[0];
+ struct microcode_header_intel hdr;
+ unsigned int bits[0];
};
/* microcode format is extended from prescott processors */
struct extended_signature {
- unsigned int sig;
- unsigned int pf;
- unsigned int cksum;
+ unsigned int sig;
+ unsigned int pf;
+ unsigned int cksum;
};
struct extended_sigtable {
- unsigned int count;
- unsigned int cksum;
- unsigned int reserved[3];
- struct extended_signature sigs[0];
+ unsigned int count;
+ unsigned int cksum;
+ unsigned int reserved[3];
+ struct extended_signature sigs[0];
};
struct equiv_cpu_entry {
- unsigned int installed_cpu;
- unsigned int fixed_errata_mask;
- unsigned int fixed_errata_compare;
- unsigned int equiv_cpu;
+ unsigned int installed_cpu;
+ unsigned int fixed_errata_mask;
+ unsigned int fixed_errata_compare;
+ unsigned int equiv_cpu;
};
struct microcode_header_amd {
- unsigned int data_code;
- unsigned int patch_id;
- unsigned char mc_patch_data_id[2];
- unsigned char mc_patch_data_len;
- unsigned char init_flag;
- unsigned int mc_patch_data_checksum;
- unsigned int nb_dev_id;
- unsigned int sb_dev_id;
- unsigned char processor_rev_id[2];
- unsigned char nb_rev_id;
- unsigned char sb_rev_id;
- unsigned char bios_api_rev;
- unsigned char reserved1[3];
- unsigned int match_reg[8];
+ unsigned int data_code;
+ unsigned int patch_id;
+ unsigned char mc_patch_data_id[2];
+ unsigned char mc_patch_data_len;
+ unsigned char init_flag;
+ unsigned int mc_patch_data_checksum;
+ unsigned int nb_dev_id;
+ unsigned int sb_dev_id;
+ unsigned char processor_rev_id[2];
+ unsigned char nb_rev_id;
+ unsigned char sb_rev_id;
+ unsigned char bios_api_rev;
+ unsigned char reserved1[3];
+ unsigned int match_reg[8];
};
struct microcode_amd {
- struct microcode_header_amd hdr;
- unsigned int mpb[0];
+ struct microcode_header_amd hdr;
+ unsigned int mpb[0];
};
struct cpu_signature {
- unsigned int sig;
- unsigned int pf;
- unsigned int rev;
+ unsigned int sig;
+ unsigned int pf;
+ unsigned int rev;
};
struct ucode_cpu_info {
- struct cpu_signature cpu_sig;
- int valid;
- union {
- struct microcode_intel *mc_intel;
- struct microcode_amd *mc_amd;
- void *valid_mc;
- } mc;
+ struct cpu_signature cpu_sig;
+ int valid;
+ union {
+ struct microcode_intel *mc_intel;
+ struct microcode_amd *mc_amd;
+ void *valid_mc;
+ } mc;
};
extern struct ucode_cpu_info ucode_cpu_info[];