[IA64] Enable switch to PHY_D mmu mode

Last patch for PHY_D mmu mode

Signed-off-by: Tristan Gingold <tgingold@free.fr>

diff --git a/xen/arch/ia64/vmx/optvfault.S b/xen/arch/ia64/vmx/optvfault.S
index 240b743a02ff1793b2b306ef3696bce861d6ce90..9876ab01af27d261ad28256de809469f1e68402b 100644 (file)
--- a/xen/arch/ia64/vmx/optvfault.S
+++ b/xen/arch/ia64/vmx/optvfault.S
@@ -209,9 +209,9 @@ GLOBAL_ENTRY(vmx_asm_rsm)
     tbit.z.or p6,p0=r26,IA64_PSR_DT_BIT
     (p6) br.dptk vmx_resume_to_guest  // DT not cleared or already in phy mode
     ;;
-    // Switch to meta physical mode.
-    add r26=IA64_VCPU_META_RID_DT_OFFSET,r21
-    mov r23=VMX_MMU_PHY_DT
+    // Switch to meta physical mode D.
+    add r26=IA64_VCPU_META_RID_D_OFFSET,r21
+    mov r23=VMX_MMU_PHY_D
     ;;
     ld8 r26=[r26]
     st1 [r22]=r23 
@@ -338,10 +338,10 @@ vmx_asm_mov_to_psr_back:
     cmp.eq p6,p7=r28,r27 // (new_vpsr & (dt+rt+it)) == (dt+rt+it)
     (p5) br.many vmx_asm_mov_to_psr_1 // no change
     ;;
-    //virtual to physical
-    (p7) add r26=IA64_VCPU_META_RID_DT_OFFSET,r21
-    (p7) add r27=IA64_VCPU_META_RID_DT_OFFSET,r21
-    (p7) mov r23=VMX_MMU_PHY_DT
+    //virtual to physical D
+    (p7) add r26=IA64_VCPU_META_RID_D_OFFSET,r21
+    (p7) add r27=IA64_VCPU_META_RID_D_OFFSET,r21
+    (p7) mov r23=VMX_MMU_PHY_D
     ;;
     //physical to virtual
     (p6) add r26=IA64_VCPU_META_SAVED_RR0_OFFSET,r21

diff --git a/xen/arch/ia64/vmx/vmx_phy_mode.c b/xen/arch/ia64/vmx/vmx_phy_mode.c
index 3d4fbf32874a88a3ec01c3ea1971c49a4316f6c2..6baa3444992239f774e1b4497f98d31c59794787 100644 (file)
--- a/xen/arch/ia64/vmx/vmx_phy_mode.c
+++ b/xen/arch/ia64/vmx/vmx_phy_mode.c
@@ -235,10 +235,13 @@ switch_mm_mode(VCPU *vcpu, IA64_PSR old_psr, IA64_PSR new_psr)
     perfc_incra(vmx_switch_mm_mode, act);
     switch (act) {
     case SW_V2P_DT:
+        vcpu->arch.arch_vmx.mmu_mode = VMX_MMU_PHY_DT;
+        switch_to_physical_rid(vcpu);
+        break;
     case SW_V2P_D:
-//        printk("V -> P mode transition: (0x%lx -> 0x%lx)\n",
+//        printk("V -> P_D mode transition: (0x%lx -> 0x%lx)\n",
 //               old_psr.val, new_psr.val);
-        vcpu->arch.arch_vmx.mmu_mode = VMX_MMU_PHY_DT;
+        vcpu->arch.arch_vmx.mmu_mode = VMX_MMU_PHY_D;
         switch_to_physical_rid(vcpu);
         break;
     case SW_P2V: