struct trap_bounce *tb;
const struct trap_info *ti;
const uint8_t vector = event->vector;
- const bool use_error_code =
- ((vector < 32) && (TRAP_HAVE_EC & (1u << vector)));
unsigned int error_code = event->error_code;
+ bool use_error_code;
ASSERT(vector == event->vector); /* Confirm no truncation. */
+ if ( event->type == X86_EVENTTYPE_HW_EXCEPTION )
+ {
+ ASSERT(vector < 32);
+ use_error_code = TRAP_HAVE_EC & (1u << vector);
+ }
+ else
+ {
+ ASSERT(event->type == X86_EVENTTYPE_SW_INTERRUPT);
+ use_error_code = false;
+ }
if ( use_error_code )
ASSERT(error_code != X86_EVENT_NO_EC);
else
tb->cs = ti->cs;
tb->eip = ti->address;
- if ( vector == TRAP_page_fault )
+ if ( event->type == X86_EVENTTYPE_HW_EXCEPTION &&
+ vector == TRAP_page_fault )
{
v->arch.pv_vcpu.ctrlreg[2] = event->cr2;
arch_set_cr2(v, event->cr2);
{
const struct x86_event event = {
.vector = trapnr,
+ .type = X86_EVENTTYPE_HW_EXCEPTION,
.error_code = (((trapnr < 32) && (TRAP_HAVE_EC & (1u << trapnr)))
? regs->error_code : X86_EVENT_NO_EC),
};
if ( permit_softint(TI_GET_DPL(ti), v, regs) )
{
regs->rip += 2;
- do_guest_trap(vector, regs);
+ pv_inject_sw_interrupt(vector);
return;
}
}
pv_inject_event(&event);
}
+static inline void pv_inject_sw_interrupt(unsigned int vector)
+{
+ const struct x86_event event = {
+ .vector = vector,
+ .type = X86_EVENTTYPE_SW_INTERRUPT,
+ .error_code = X86_EVENT_NO_EC,
+ };
+
+ pv_inject_event(&event);
+}
+
#endif /* __ASM_DOMAIN_H__ */
/*