x86/cpuid: expose NullSelectorClearsBase CPUID bit to guests
authorJane Malalane <jane.malalane@citrix.com>
Tue, 7 Sep 2021 07:40:25 +0000 (09:40 +0200)
committerJan Beulich <jbeulich@suse.com>
Tue, 7 Sep 2021 07:40:25 +0000 (09:40 +0200)
AMD Zen3 adds the NullSelectorClearsBase bit to indicate that loading
a NULL segment selector zeroes the base and limit fields, as well as
just attributes.

Expose bit to all guests.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Jane Malalane <jane.malalane@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
tools/libs/light/libxl_cpuid.c
tools/misc/xen-cpuid.c
xen/include/public/arch-x86/cpufeatureset.h

index b2c673841a4541e642acfacc8e9922825e30df36..d667c36f31d428c25904b4dab980d46765b686af 100644 (file)
@@ -289,6 +289,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str)
         {"svm_pausefilt",0x8000000a, NA, CPUID_REG_EDX, 10,  1},
 
         {"lfence+",      0x80000021, NA, CPUID_REG_EAX,  2,  1},
+        {"nscb",         0x80000021, NA, CPUID_REG_EAX,  6,  1},
 
         {"maxhvleaf",    0x40000000, NA, CPUID_REG_EAX,  0,  8},
 
index 735bcf8f0e609ed1104615a5700b22032802ff41..d79e67ecfb0d7a41c17abe10459bd385dc6fa9c0 100644 (file)
@@ -185,6 +185,7 @@ static const char *const str_7a1[32] =
 static const char *const str_e21a[32] =
 {
     [ 2] = "lfence+",
+    [ 6] = "nscb",
 };
 
 static const struct {
index 380b51b1b3b80192f35d8da2bb9850b293a5b9da..f0e5fabfeddc6a995cfb1c73eb43cb25203facb2 100644 (file)
@@ -285,6 +285,7 @@ XEN_CPUFEATURE(FSRCS,        10*32+12) /*A  Fast Short REP CMPSB/SCASB */
 
 /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */
 XEN_CPUFEATURE(LFENCE_DISPATCH,    11*32+ 2) /*A  LFENCE always serializing */
+XEN_CPUFEATURE(NSCB,               11*32+ 6) /*A  Null Selector Clears Base (and limit too) */
 
 #endif /* XEN_CPUFEATURE */