xen/arm: acpi: Relax hw domain mapping attributes to p2m_mmio_direct_c
authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Thu, 26 Jan 2017 13:16:02 +0000 (14:16 +0100)
committerStefano Stabellini <sstabellini@kernel.org>
Tue, 31 Jan 2017 22:14:29 +0000 (14:14 -0800)
Since the hardware domain is a trusted domain, we extend the
trust to include making final decisions on what attributes to
use when mapping memory regions.

For ACPI configured hardware domains, this patch relaxes the hardware
domains mapping attributes to p2m_mmio_direct_c. This will allow the
hardware domain to control the attributes via its S1 mappings.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Julien Grall <julien.grall@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
xen/arch/arm/p2m.c
xen/include/public/memory.h

index 980d9918ec234956675ef5a65bb776d65dc19988..d762b1102d289eda746714d373cd89f76f484e57 100644 (file)
@@ -1104,7 +1104,7 @@ int map_dev_mmio_region(struct domain *d,
     if ( !(nr && iomem_access_permitted(d, mfn_x(mfn), mfn_x(mfn) + nr - 1)) )
         return 0;
 
-    res = map_mmio_regions(d, gfn, nr, mfn);
+    res = p2m_insert_mapping(d, gfn, nr, mfn, p2m_mmio_direct_c);
     if ( res < 0 )
     {
         printk(XENLOG_G_ERR "Unable to map MFNs [%#"PRI_mfn" - %#"PRI_mfn" in Dom%d\n",
index e63304773375f13bdfb74819766ba7fbcdb25fd1..6eee0c8a16dcab4597d65ea29e614765158f94bb 100644 (file)
@@ -222,9 +222,9 @@ DEFINE_XEN_GUEST_HANDLE(xen_machphys_mapping_t);
                                     * XENMEM_add_to_physmap_batch only. */
 #define XENMAPSPACE_dev_mmio     5 /* device mmio region
                                       ARM only; the region is mapped in
-                                      Stage-2 using the memory attribute
-                                      "Device-nGnRE" (previously named
-                                      "Device" on ARMv7) */
+                                      Stage-2 using the Normal Memory
+                                      Inner/Outer Write-Back Cacheable
+                                      memory attribute. */
 /* ` } */
 
 /*