amd iommu: Fix incorrect definitions.

Signed-off-by: Wei Wang <wei.wang2@amd.com>
Committed-by: Keir Fraser <keir@xen.org>

diff --git a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
index 59d33e98d0d280588a0c4731ef37d77bf96fc041..c6bf6cd8ec32334849797534b0cbdb9ba9c34b78 100644 (file)
--- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
+++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
@@ -293,10 +293,8 @@
 #define IOMMU_CONTROL_EVENT_LOG_INT_SHIFT              3
 #define IOMMU_CONTROL_COMP_WAIT_INT_MASK               0x00000010
 #define IOMMU_CONTROL_COMP_WAIT_INT_SHIFT              4
-#define IOMMU_CONTROL_TRANSLATION_CHECK_DISABLE_MASK   0x00000020
-#define IOMMU_CONTROL_TRANSLATION_CHECK_DISABLE_SHIFT  5
-#define IOMMU_CONTROL_INVALIDATION_TIMEOUT_MASK                0x000000C0
-#define IOMMU_CONTROL_INVALIDATION_TIMEOUT_SHIFT       6
+#define IOMMU_CONTROL_INVALIDATION_TIMEOUT_MASK                0x000000E0
+#define IOMMU_CONTROL_INVALIDATION_TIMEOUT_SHIFT       5
 #define IOMMU_CONTROL_PASS_POSTED_WRITE_MASK           0x00000100
 #define IOMMU_CONTROL_PASS_POSTED_WRITE_SHIFT          8
 #define IOMMU_CONTROL_RESP_PASS_POSTED_WRITE_MASK      0x00000200