x86: Decode CPUID for TSC guarantees.
authorKeir Fraser <keir.fraser@citrix.com>
Mon, 15 Dec 2008 11:37:14 +0000 (11:37 +0000)
committerKeir Fraser <keir.fraser@citrix.com>
Mon, 15 Dec 2008 11:37:14 +0000 (11:37 +0000)
Signed-off-by: Wei Gang <gang.wei@intel.com>
xen/arch/x86/cpu/amd.c
xen/arch/x86/cpu/intel.c
xen/include/asm-x86/cpufeature.h

index 1f13d93a214444c8454cbcad7435b1265c8dbe69..f2ff228a16379335f0c8b3e0e30cc111cc9fa3ee 100644 (file)
@@ -461,8 +461,10 @@ static void __devinit init_amd(struct cpuinfo_x86 *c)
 
        if (cpuid_eax(0x80000000) >= 0x80000007) {
                c->x86_power = cpuid_edx(0x80000007);
-               if (c->x86_power & (1<<8))
+               if (c->x86_power & (1<<8)) {
                        set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
+                       set_bit(X86_FEATURE_NOSTOP_TSC, c->x86_capability);
+               }
        }
 
 #ifdef CONFIG_X86_HT
index f8fdb8af286a294a11be0c1d42963c2ef5bf8ebb..1574004f6cb7e48db31977a03945f6135172224b 100644 (file)
@@ -218,6 +218,10 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)
        if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
                (c->x86 == 0x6 && c->x86_model >= 0x0e))
                set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
+       if (cpuid_edx(0x80000007) & (1u<<8)) {
+               set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
+               set_bit(X86_FEATURE_NOSTOP_TSC, c->x86_capability);
+       }
 
        start_vmx();
 }
index 481236c833b8a7b38ab1e37f2ab69877e5e364e8..7df04869819067c69aabda7cb41fbb5de90bfdb9 100644 (file)
@@ -74,6 +74,7 @@
 #define X86_FEATURE_P3         (3*32+ 6) /* P3 */
 #define X86_FEATURE_P4         (3*32+ 7) /* P4 */
 #define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */
+#define X86_FEATURE_NOSTOP_TSC (3*32+ 9) /* TSC does not stop in C states */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3       (4*32+ 0) /* Streaming SIMD Extensions-3 */