mwait_idle: Skylake Client Support

Skylake Client CPU idle Power states (C-states)
are similar to the previous generation, Broadwell.
However, Skylake does get its own table with updated
worst-case latency and average energy-break-even residency values.

Signed-off-by: Len Brown <len.brown@intel.com>
[Linux commit 493f133f47750aa5566fafa9403617e3f0506f8c]

mwait_idle: Skylake Client Support - updated

Addition of PC9 state, and minor tweaks to existing PC6 and PC8 states.

Signed-off-by: Len Brown <len.brown@intel.com>
[Linux commit 135919a3a80565070b9645009e65f73e72c661c0]
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index 07d8794f22c114cd94ff1d9eb89a355f99268e75..87f0e60a800ad09baed7bac0b2b4fef5655eba27 100644 (file)
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -477,6 +477,58 @@ static const struct cpuidle_state bdw_cstates[] = {
        {}
 };
 
+static const struct cpuidle_state skl_cstates[] = {
+       {
+               .name = "C1-SKL",
+               .flags = MWAIT2flg(0x00),
+               .exit_latency = 2,
+               .target_residency = 2,
+       },
+       {
+               .name = "C1E-SKL",
+               .flags = MWAIT2flg(0x01),
+               .exit_latency = 10,
+               .target_residency = 20,
+       },
+       {
+               .name = "C3-SKL",
+               .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 70,
+               .target_residency = 100,
+       },
+       {
+               .name = "C6-SKL",
+               .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 85,
+               .target_residency = 200,
+       },
+       {
+               .name = "C7s-SKL",
+               .flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 124,
+               .target_residency = 800,
+       },
+       {
+               .name = "C8-SKL",
+               .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 200,
+               .target_residency = 800,
+       },
+       {
+               .name = "C9-SKL",
+               .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 480,
+               .target_residency = 5000,
+       },
+       {
+               .name = "C10-SKL",
+               .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 890,
+               .target_residency = 5000,
+       },
+       {}
+};
+
 static const struct cpuidle_state atom_cstates[] = {
        {
                .name = "C1E-ATM",
@@ -683,6 +735,11 @@ static const struct idle_cpu idle_cpu_bdw = {
        .disable_promotion_to_c1e = 1,
 };
 
+static const struct idle_cpu idle_cpu_skl = {
+       .state_table = skl_cstates,
+       .disable_promotion_to_c1e = 1,
+};
+
 static const struct idle_cpu idle_cpu_avn = {
        .state_table = avn_cstates,
        .disable_promotion_to_c1e = 1,
@@ -718,6 +775,8 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
        ICPU(0x47, bdw),
        ICPU(0x4f, bdw),
        ICPU(0x56, bdw),
+       ICPU(0x4e, skl),
+       ICPU(0x5e, skl),
        {}
 };