return ((0xFFFFFFFF - t1) + t2 +1);
}
-static void acpi_safe_halt(void)
-{
- smp_mb__after_clear_bit();
- safe_halt();
-}
-
#define MWAIT_ECX_INTERRUPT_BREAK (0x1)
/*
unused = inl(pmtmr_ioport);
return;
case ACPI_CSTATE_EM_HALT:
- acpi_safe_halt();
+ safe_halt();
local_irq_disable();
return;
}
if ( pm_idle_save )
pm_idle_save();
else
- acpi_safe_halt();
+ safe_halt();
return;
}
* @nr: Bit to clear
* @addr: Address to start counting from
*
- * clear_bit() is atomic and may not be reordered. However, it does
- * not contain a memory barrier, so if it is used for locking purposes,
- * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
- * in order to ensure changes are visible on other processors.
+ * clear_bit() is atomic and may not be reordered.
*/
static inline void clear_bit(int nr, volatile void *addr)
{
__clear_bit(nr, addr); \
})
-#define smp_mb__before_clear_bit() ((void)0)
-#define smp_mb__after_clear_bit() ((void)0)
-
/**
* __change_bit - Toggle a bit in memory
* @nr: the bit to set