*r = vgic_reg32_extract(GICR_SYNCR_NOT_BUSY, info);
return 1;
- case VREG64(GICR_MOVLPIR):
- /* WO Read as zero */
- goto read_as_zero_64;
+ case VREG64(0x0100):
+ goto read_impl_defined;
- case VREG64(GICR_MOVALLR):
- /* WO Read as zero */
- goto read_as_zero_64;
+ case VREG64(0x0110):
+ goto read_impl_defined;
case 0xFFD0 ... 0xFFE4:
/* Implementation defined identification registers */
/* RO */
goto write_ignore_32;
- case VREG64(GICR_MOVLPIR):
- /* LPI is not implemented */
- goto write_ignore_64;
+ case VREG64(0x0100):
+ goto write_impl_defined;
- case VREG64(GICR_MOVALLR):
- /* LPI is not implemented */
- goto write_ignore_64;
+ case VREG64(0x0110):
+ goto write_impl_defined;
case 0xFFD0 ... 0xFFE4:
/* Implementation defined identification registers */
#define GICR_INVLPIR (0x00A0)
#define GICR_INVALLR (0x00B0)
#define GICR_SYNCR (0x00C0)
-#define GICR_MOVLPIR (0x100)
-#define GICR_MOVALLR (0x0110)
#define GICR_PIDR2 GICD_PIDR2
/* GICR for SGI's & PPI's */