tools/flask/utils/flask-label-pci
tools/fuzz/libelf/afl-libelf-fuzzer
tools/fuzz/x86_instruction_emulator/asm
-tools/fuzz/x86_instruction_emulator/x86_emulate*
+tools/fuzz/x86_instruction_emulator/x86_emulate
+tools/fuzz/x86_instruction_emulator/x86-emulate.[ch]
tools/fuzz/x86_instruction_emulator/afl-harness
tools/helpers/_paths.h
tools/helpers/init-xenstore-domain
asm/%: asm ;
-x86_emulate.c x86_emulate.h: %:
+x86-emulate.c x86-emulate.h: %:
[ -L $* ] || ln -sf $(XEN_ROOT)/tools/tests/x86_emulator/$*
CFLAGS += $(CFLAGS_xeninclude) -D__XEN_TOOLS__ -I.
x86.h := asm/x86-vendors.h asm/x86-defns.h asm/msr-index.h
-x86_emulate.h := x86_emulate.h x86_emulate/x86_emulate.h $(x86.h)
+x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h)
-x86_emulate.o: x86_emulate.c x86_emulate/x86_emulate.c $(x86_emulate.h)
+x86-emulate.o: x86-emulate.c x86_emulate/x86_emulate.c $(x86_emulate.h)
fuzz-emul.o: $(x86_emulate.h)
-x86-insn-fuzzer.a: fuzz-emul.o x86_emulate.o
+x86-insn-fuzzer.a: fuzz-emul.o x86-emulate.o
$(AR) rc $@ $^
-afl-harness: afl-harness.o fuzz-emul.o x86_emulate.o
+afl-harness: afl-harness.o fuzz-emul.o x86-emulate.o
$(CC) $(CFLAGS) $^ -o $@
# Common targets
.PHONY: distclean
distclean: clean
- rm -f x86_emulate x86_emulate.c x86_emulate.h asm
+ rm -f x86_emulate x86-emulate.c x86-emulate.h asm
.PHONY: clean
clean:
#include <unistd.h>
#include <xen/xen.h>
-#include "x86_emulate.h"
+#include "x86-emulate.h"
#define MSR_INDEX_MAX 16
$(addsuffix .c,$(SIMD)) $(addsuffix -avx.c,$(filter sse%,$(SIMD))):
ln -sf simd.c $@
-$(TARGET): x86_emulate.o test_x86_emulator.o
+$(TARGET): x86-emulate.o test_x86_emulator.o
$(HOSTCC) $(HOSTCFLAGS) -o $@ $^
.PHONY: clean
HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH))
x86.h := asm/x86-vendors.h asm/x86-defns.h asm/msr-index.h
-x86_emulate.h := x86_emulate.h x86_emulate/x86_emulate.h $(x86.h)
+x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h)
-x86_emulate.o: x86_emulate.c x86_emulate/x86_emulate.c $(x86_emulate.h)
+x86-emulate.o: x86-emulate.c x86_emulate/x86_emulate.c $(x86_emulate.h)
$(HOSTCC) $(HOSTCFLAGS) -D__XEN_TOOLS__ -c -g -o $@ $<
test_x86_emulator.o: test_x86_emulator.c $(addsuffix .h,$(TESTCASES)) $(x86_emulate.h)
#include <stdio.h>
#include <sys/mman.h>
-#include "x86_emulate.h"
+#include "x86-emulate.h"
#include "blowfish.h"
#include "sse.h"
#include "sse2.h"
--- /dev/null
+#include "x86-emulate.h"
+
+#include <sys/mman.h>
+
+#define cpu_has_amd_erratum(nr) 0
+#define mark_regs_dirty(r) ((void)(r))
+#define cpu_has_mpx false
+#define read_bndcfgu() 0
+#define xstate_set_init(what)
+
+/* For generic assembly code: use macros to define operation/operand sizes. */
+#ifdef __i386__
+# define r(name) e ## name
+# define __OS "l" /* Operation Suffix */
+# define __OP "e" /* Operand Prefix */
+#else
+# define r(name) r ## name
+# define __OS "q" /* Operation Suffix */
+# define __OP "r" /* Operand Prefix */
+#endif
+
+#define get_stub(stb) ({ \
+ assert(!(stb).addr); \
+ (void *)((stb).addr = (uintptr_t)(stb).buf); \
+})
+#define put_stub(stb) ((stb).addr = 0)
+
+uint32_t mxcsr_mask = 0x0000ffbf;
+
+bool emul_test_init(void)
+{
+ unsigned long sp;
+
+ if ( cpu_has_fxsr )
+ {
+ static union __attribute__((__aligned__(16))) {
+ char x[464];
+ struct {
+ uint32_t other[6];
+ uint32_t mxcsr;
+ uint32_t mxcsr_mask;
+ /* ... */
+ };
+ } fxs;
+
+ asm ( "fxsave %0" : "=m" (fxs) );
+ if ( fxs.mxcsr_mask )
+ mxcsr_mask = fxs.mxcsr_mask;
+ }
+
+ /*
+ * Mark the entire stack executable so that the stub executions
+ * don't fault
+ */
+#ifdef __x86_64__
+ asm ("movq %%rsp, %0" : "=g" (sp));
+#else
+ asm ("movl %%esp, %0" : "=g" (sp));
+#endif
+
+ return mprotect((void *)(sp & -0x1000L) - (MMAP_SZ - 0x1000),
+ MMAP_SZ, PROT_READ|PROT_WRITE|PROT_EXEC) == 0;
+}
+
+int emul_test_cpuid(
+ uint32_t leaf,
+ uint32_t subleaf,
+ struct cpuid_leaf *res,
+ struct x86_emulate_ctxt *ctxt)
+{
+ asm ("cpuid"
+ : "=a" (res->a), "=b" (res->b), "=c" (res->c), "=d" (res->d)
+ : "a" (leaf), "c" (subleaf));
+
+ /*
+ * The emulator doesn't itself use MOVBE, so we can always run the
+ * respective tests.
+ */
+ if ( leaf == 1 )
+ res->c |= 1U << 22;
+
+ /*
+ * The emulator doesn't itself use ADCX/ADOX/RDPID, so we can always run
+ * the respective tests.
+ */
+ if ( leaf == 7 && subleaf == 0 )
+ {
+ res->b |= 1U << 19;
+ res->c |= 1U << 22;
+ }
+
+ /*
+ * The emulator doesn't itself use CLZERO, so we can always run the
+ * respective test(s).
+ */
+ if ( leaf == 0x80000008 )
+ res->b |= 1U << 0;
+
+ return X86EMUL_OKAY;
+}
+
+int emul_test_read_cr(
+ unsigned int reg,
+ unsigned long *val,
+ struct x86_emulate_ctxt *ctxt)
+{
+ /* Fake just enough state for the emulator's _get_fpu() to be happy. */
+ switch ( reg )
+ {
+ case 0:
+ *val = 0x00000001; /* PE */
+ return X86EMUL_OKAY;
+
+ case 4:
+ /* OSFXSR, OSXMMEXCPT, and maybe OSXSAVE */
+ *val = 0x00000600 | (cpu_has_xsave ? 0x00040000 : 0);
+ return X86EMUL_OKAY;
+ }
+
+ return X86EMUL_UNHANDLEABLE;
+}
+
+int emul_test_get_fpu(
+ void (*exception_callback)(void *, struct cpu_user_regs *),
+ void *exception_callback_arg,
+ enum x86_emulate_fpu_type type,
+ struct x86_emulate_ctxt *ctxt)
+{
+ switch ( type )
+ {
+ case X86EMUL_FPU_fpu:
+ break;
+ case X86EMUL_FPU_mmx:
+ if ( cpu_has_mmx )
+ break;
+ case X86EMUL_FPU_xmm:
+ if ( cpu_has_sse )
+ break;
+ case X86EMUL_FPU_ymm:
+ if ( cpu_has_avx )
+ break;
+ default:
+ return X86EMUL_UNHANDLEABLE;
+ }
+ return X86EMUL_OKAY;
+}
+
+void emul_test_put_fpu(
+ struct x86_emulate_ctxt *ctxt,
+ enum x86_emulate_fpu_type backout,
+ const struct x86_emul_fpu_aux *aux)
+{
+ /* TBD */
+}
+
+#include "x86_emulate/x86_emulate.c"
--- /dev/null
+#include <assert.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <xen/xen.h>
+
+#include <asm/msr-index.h>
+#include <asm/x86-defns.h>
+#include <asm/x86-vendors.h>
+
+#define BUG() abort()
+#define ASSERT assert
+#define ASSERT_UNREACHABLE() assert(!__LINE__)
+
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof(*(a)))
+
+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
+/* Force a compilation error if condition is true */
+#define BUILD_BUG_ON(cond) ({ _Static_assert(!(cond), "!(" #cond ")"); })
+#define BUILD_BUG_ON_ZERO(cond) \
+ sizeof(struct { _Static_assert(!(cond), "!(" #cond ")"); })
+#else
+#define BUILD_BUG_ON_ZERO(cond) sizeof(struct { int:-!!(cond); })
+#define BUILD_BUG_ON(cond) ((void)BUILD_BUG_ON_ZERO(cond))
+#endif
+
+#define MASK_EXTR(v, m) (((v) & (m)) / ((m) & -(m)))
+#define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m))
+
+#define __init
+#define __maybe_unused __attribute__((__unused__))
+
+#define likely(x) __builtin_expect(!!(x), true)
+#define unlikely(x) __builtin_expect(!!(x), false)
+
+#define container_of(ptr, type, member) ({ \
+ typeof(((type *)0)->member) *mptr__ = (ptr); \
+ (type *)((char *)mptr__ - offsetof(type, member)); \
+})
+
+#define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63))
+
+extern uint32_t mxcsr_mask;
+
+#define MMAP_SZ 16384
+bool emul_test_init(void);
+
+#include "x86_emulate/x86_emulate.h"
+
+static inline uint64_t xgetbv(uint32_t xcr)
+{
+ uint32_t lo, hi;
+
+ asm ( ".byte 0x0f, 0x01, 0xd0" : "=a" (lo), "=d" (hi) : "c" (xcr) );
+
+ return ((uint64_t)hi << 32) | lo;
+}
+
+#define cache_line_size() ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ res.d & (1U << 19) ? (res.b >> 5) & 0x7f8 : 0; \
+})
+
+#define cpu_has_mmx ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ (res.d & (1U << 23)) != 0; \
+})
+
+#define cpu_has_fxsr ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ (res.d & (1U << 24)) != 0; \
+})
+
+#define cpu_has_sse ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ (res.d & (1U << 25)) != 0; \
+})
+
+#define cpu_has_sse2 ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ (res.d & (1U << 26)) != 0; \
+})
+
+#define cpu_has_sse3 ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ (res.c & (1U << 0)) != 0; \
+})
+
+#define cpu_has_sse4_1 ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ (res.c & (1U << 19)) != 0; \
+})
+
+#define cpu_has_sse4_2 ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ (res.c & (1U << 20)) != 0; \
+})
+
+#define cpu_has_popcnt ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ (res.c & (1U << 23)) != 0; \
+})
+
+#define cpu_has_xsave ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ /* Intentionally checking OSXSAVE here. */ \
+ (res.c & (1U << 27)) != 0; \
+})
+
+#define cpu_has_avx ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ if ( !(res.c & (1U << 27)) || ((xgetbv(0) & 6) != 6) ) \
+ res.c = 0; \
+ (res.c & (1U << 28)) != 0; \
+})
+
+#define cpu_has_avx2 ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(1, 0, &res, NULL); \
+ if ( !(res.c & (1U << 27)) || ((xgetbv(0) & 6) != 6) ) \
+ res.b = 0; \
+ else { \
+ emul_test_cpuid(7, 0, &res, NULL); \
+ } \
+ (res.b & (1U << 5)) != 0; \
+})
+
+#define cpu_has_bmi1 ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(7, 0, &res, NULL); \
+ (res.b & (1U << 3)) != 0; \
+})
+
+#define cpu_has_bmi2 ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(7, 0, &res, NULL); \
+ (res.b & (1U << 8)) != 0; \
+})
+
+#define cpu_has_sse4a ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(0x80000001, 0, &res, NULL); \
+ (res.c & (1U << 6)) != 0; \
+})
+
+#define cpu_has_tbm ({ \
+ struct cpuid_leaf res; \
+ emul_test_cpuid(0x80000001, 0, &res, NULL); \
+ (res.c & (1U << 21)) != 0; \
+})
+
+int emul_test_cpuid(
+ uint32_t leaf,
+ uint32_t subleaf,
+ struct cpuid_leaf *res,
+ struct x86_emulate_ctxt *ctxt);
+
+int emul_test_read_cr(
+ unsigned int reg,
+ unsigned long *val,
+ struct x86_emulate_ctxt *ctxt);
+
+int emul_test_get_fpu(
+ void (*exception_callback)(void *, struct cpu_user_regs *),
+ void *exception_callback_arg,
+ enum x86_emulate_fpu_type type,
+ struct x86_emulate_ctxt *ctxt);
+
+void emul_test_put_fpu(
+ struct x86_emulate_ctxt *ctxt,
+ enum x86_emulate_fpu_type backout,
+ const struct x86_emul_fpu_aux *aux);
+++ /dev/null
-#include "x86_emulate.h"
-
-#include <sys/mman.h>
-
-#define cpu_has_amd_erratum(nr) 0
-#define mark_regs_dirty(r) ((void)(r))
-#define cpu_has_mpx false
-#define read_bndcfgu() 0
-#define xstate_set_init(what)
-
-/* For generic assembly code: use macros to define operation/operand sizes. */
-#ifdef __i386__
-# define r(name) e ## name
-# define __OS "l" /* Operation Suffix */
-# define __OP "e" /* Operand Prefix */
-#else
-# define r(name) r ## name
-# define __OS "q" /* Operation Suffix */
-# define __OP "r" /* Operand Prefix */
-#endif
-
-#define get_stub(stb) ({ \
- assert(!(stb).addr); \
- (void *)((stb).addr = (uintptr_t)(stb).buf); \
-})
-#define put_stub(stb) ((stb).addr = 0)
-
-uint32_t mxcsr_mask = 0x0000ffbf;
-
-bool emul_test_init(void)
-{
- unsigned long sp;
-
- if ( cpu_has_fxsr )
- {
- static union __attribute__((__aligned__(16))) {
- char x[464];
- struct {
- uint32_t other[6];
- uint32_t mxcsr;
- uint32_t mxcsr_mask;
- /* ... */
- };
- } fxs;
-
- asm ( "fxsave %0" : "=m" (fxs) );
- if ( fxs.mxcsr_mask )
- mxcsr_mask = fxs.mxcsr_mask;
- }
-
- /*
- * Mark the entire stack executable so that the stub executions
- * don't fault
- */
-#ifdef __x86_64__
- asm ("movq %%rsp, %0" : "=g" (sp));
-#else
- asm ("movl %%esp, %0" : "=g" (sp));
-#endif
-
- return mprotect((void *)(sp & -0x1000L) - (MMAP_SZ - 0x1000),
- MMAP_SZ, PROT_READ|PROT_WRITE|PROT_EXEC) == 0;
-}
-
-int emul_test_cpuid(
- uint32_t leaf,
- uint32_t subleaf,
- struct cpuid_leaf *res,
- struct x86_emulate_ctxt *ctxt)
-{
- asm ("cpuid"
- : "=a" (res->a), "=b" (res->b), "=c" (res->c), "=d" (res->d)
- : "a" (leaf), "c" (subleaf));
-
- /*
- * The emulator doesn't itself use MOVBE, so we can always run the
- * respective tests.
- */
- if ( leaf == 1 )
- res->c |= 1U << 22;
-
- /*
- * The emulator doesn't itself use ADCX/ADOX/RDPID, so we can always run
- * the respective tests.
- */
- if ( leaf == 7 && subleaf == 0 )
- {
- res->b |= 1U << 19;
- res->c |= 1U << 22;
- }
-
- /*
- * The emulator doesn't itself use CLZERO, so we can always run the
- * respective test(s).
- */
- if ( leaf == 0x80000008 )
- res->b |= 1U << 0;
-
- return X86EMUL_OKAY;
-}
-
-int emul_test_read_cr(
- unsigned int reg,
- unsigned long *val,
- struct x86_emulate_ctxt *ctxt)
-{
- /* Fake just enough state for the emulator's _get_fpu() to be happy. */
- switch ( reg )
- {
- case 0:
- *val = 0x00000001; /* PE */
- return X86EMUL_OKAY;
-
- case 4:
- /* OSFXSR, OSXMMEXCPT, and maybe OSXSAVE */
- *val = 0x00000600 | (cpu_has_xsave ? 0x00040000 : 0);
- return X86EMUL_OKAY;
- }
-
- return X86EMUL_UNHANDLEABLE;
-}
-
-int emul_test_get_fpu(
- void (*exception_callback)(void *, struct cpu_user_regs *),
- void *exception_callback_arg,
- enum x86_emulate_fpu_type type,
- struct x86_emulate_ctxt *ctxt)
-{
- switch ( type )
- {
- case X86EMUL_FPU_fpu:
- break;
- case X86EMUL_FPU_mmx:
- if ( cpu_has_mmx )
- break;
- case X86EMUL_FPU_xmm:
- if ( cpu_has_sse )
- break;
- case X86EMUL_FPU_ymm:
- if ( cpu_has_avx )
- break;
- default:
- return X86EMUL_UNHANDLEABLE;
- }
- return X86EMUL_OKAY;
-}
-
-void emul_test_put_fpu(
- struct x86_emulate_ctxt *ctxt,
- enum x86_emulate_fpu_type backout,
- const struct x86_emul_fpu_aux *aux)
-{
- /* TBD */
-}
-
-#include "x86_emulate/x86_emulate.c"
+++ /dev/null
-#include <assert.h>
-#include <stdbool.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <xen/xen.h>
-
-#include <asm/msr-index.h>
-#include <asm/x86-defns.h>
-#include <asm/x86-vendors.h>
-
-#define BUG() abort()
-#define ASSERT assert
-#define ASSERT_UNREACHABLE() assert(!__LINE__)
-
-#define ARRAY_SIZE(a) (sizeof(a) / sizeof(*(a)))
-
-#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
-/* Force a compilation error if condition is true */
-#define BUILD_BUG_ON(cond) ({ _Static_assert(!(cond), "!(" #cond ")"); })
-#define BUILD_BUG_ON_ZERO(cond) \
- sizeof(struct { _Static_assert(!(cond), "!(" #cond ")"); })
-#else
-#define BUILD_BUG_ON_ZERO(cond) sizeof(struct { int:-!!(cond); })
-#define BUILD_BUG_ON(cond) ((void)BUILD_BUG_ON_ZERO(cond))
-#endif
-
-#define MASK_EXTR(v, m) (((v) & (m)) / ((m) & -(m)))
-#define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m))
-
-#define __init
-#define __maybe_unused __attribute__((__unused__))
-
-#define likely(x) __builtin_expect(!!(x), true)
-#define unlikely(x) __builtin_expect(!!(x), false)
-
-#define container_of(ptr, type, member) ({ \
- typeof(((type *)0)->member) *mptr__ = (ptr); \
- (type *)((char *)mptr__ - offsetof(type, member)); \
-})
-
-#define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63))
-
-extern uint32_t mxcsr_mask;
-
-#define MMAP_SZ 16384
-bool emul_test_init(void);
-
-#include "x86_emulate/x86_emulate.h"
-
-static inline uint64_t xgetbv(uint32_t xcr)
-{
- uint32_t lo, hi;
-
- asm ( ".byte 0x0f, 0x01, 0xd0" : "=a" (lo), "=d" (hi) : "c" (xcr) );
-
- return ((uint64_t)hi << 32) | lo;
-}
-
-#define cache_line_size() ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- res.d & (1U << 19) ? (res.b >> 5) & 0x7f8 : 0; \
-})
-
-#define cpu_has_mmx ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- (res.d & (1U << 23)) != 0; \
-})
-
-#define cpu_has_fxsr ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- (res.d & (1U << 24)) != 0; \
-})
-
-#define cpu_has_sse ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- (res.d & (1U << 25)) != 0; \
-})
-
-#define cpu_has_sse2 ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- (res.d & (1U << 26)) != 0; \
-})
-
-#define cpu_has_sse3 ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- (res.c & (1U << 0)) != 0; \
-})
-
-#define cpu_has_sse4_1 ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- (res.c & (1U << 19)) != 0; \
-})
-
-#define cpu_has_sse4_2 ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- (res.c & (1U << 20)) != 0; \
-})
-
-#define cpu_has_popcnt ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- (res.c & (1U << 23)) != 0; \
-})
-
-#define cpu_has_xsave ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- /* Intentionally checking OSXSAVE here. */ \
- (res.c & (1U << 27)) != 0; \
-})
-
-#define cpu_has_avx ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- if ( !(res.c & (1U << 27)) || ((xgetbv(0) & 6) != 6) ) \
- res.c = 0; \
- (res.c & (1U << 28)) != 0; \
-})
-
-#define cpu_has_avx2 ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(1, 0, &res, NULL); \
- if ( !(res.c & (1U << 27)) || ((xgetbv(0) & 6) != 6) ) \
- res.b = 0; \
- else { \
- emul_test_cpuid(7, 0, &res, NULL); \
- } \
- (res.b & (1U << 5)) != 0; \
-})
-
-#define cpu_has_bmi1 ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(7, 0, &res, NULL); \
- (res.b & (1U << 3)) != 0; \
-})
-
-#define cpu_has_bmi2 ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(7, 0, &res, NULL); \
- (res.b & (1U << 8)) != 0; \
-})
-
-#define cpu_has_sse4a ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(0x80000001, 0, &res, NULL); \
- (res.c & (1U << 6)) != 0; \
-})
-
-#define cpu_has_tbm ({ \
- struct cpuid_leaf res; \
- emul_test_cpuid(0x80000001, 0, &res, NULL); \
- (res.c & (1U << 21)) != 0; \
-})
-
-int emul_test_cpuid(
- uint32_t leaf,
- uint32_t subleaf,
- struct cpuid_leaf *res,
- struct x86_emulate_ctxt *ctxt);
-
-int emul_test_read_cr(
- unsigned int reg,
- unsigned long *val,
- struct x86_emulate_ctxt *ctxt);
-
-int emul_test_get_fpu(
- void (*exception_callback)(void *, struct cpu_user_regs *),
- void *exception_callback_arg,
- enum x86_emulate_fpu_type type,
- struct x86_emulate_ctxt *ctxt);
-
-void emul_test_put_fpu(
- struct x86_emulate_ctxt *ctxt,
- enum x86_emulate_fpu_type backout,
- const struct x86_emul_fpu_aux *aux);