break;
case VMX_CONTROL_REG_ACCESS_TYPE_LMSW:
value = v->arch.hvm_vcpu.guest_cr[0];
- /* NB. LMSW can set, but never clear, PE. */
- value = (value & 0xFFFF0001) | ((exit_qualification >> 16) & 0xFFFF);
+ /* LMSW can: (1) set bits 0-3; (2) clear bits 1-3. */
+ value = (value & ~0xe) | ((exit_qualification >> 16) & 0xf);
HVMTRACE_LONG_1D(LMSW, current, value);
return !hvm_set_cr0(value);
default:
goto done;
break;
case 4: /* smsw */
- ea.bytes = 2;
+ if ( ea.type == OP_MEM )
+ ea.bytes = 2;
dst = ea;
fail_if(ops->read_cr == NULL);
if ( (rc = ops->read_cr(0, &dst.val, ctxt)) )
else if ( (rc = ops->read(ea.mem.seg, ea.mem.off,
&cr0w, 2, ctxt)) )
goto done;
- cr0 &= 0xffff0001; /* lmsw can set, but never clear, PE */
- cr0 |= (uint16_t)cr0w;
+ /* LMSW can: (1) set bits 0-3; (2) clear bits 1-3. */
+ cr0 = (cr0 & ~0xe) | (cr0w & 0xf);
if ( (rc = ops->write_cr(0, cr0, ctxt)) )
goto done;
break;