x86: fix cpuid reporting on PVH Dom0

dab11417d also caused some problems regarding HVM guest creation on
PVH Dom0, mainly the CR4 mask returned by hvm_cr4_guest_reserved_bits
changed from 0xfffffffffffff800 to 0xfffffffffffff893, which means HVM
guests created from a PVH Dom0 are unable to set VME, PVI, PSE or PGE
CR4 flags.

This is because cpuid on PVH guests mask PSE, PGE, PSE36 and VME
flags, so the white listing done in xc_cpuid_hvm_policy doesn't enable
those features, and the guest ends up with a very restrictive cpuid
policy.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 677074b4e628ed99d407b1045d859355e590d604..71be2aebd75eb6cb1fb6053ca325c12691f8055e 100644 (file)
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -803,12 +803,16 @@ void pv_cpuid(struct cpu_user_regs *regs)
     if ( (regs->eax & 0x7fffffff) == 0x00000001 )
     {
         /* Modify Feature Information. */
-        __clear_bit(X86_FEATURE_VME, &d);
         if ( !cpu_has_apic )
             __clear_bit(X86_FEATURE_APIC, &d);
-        __clear_bit(X86_FEATURE_PSE, &d);
-        __clear_bit(X86_FEATURE_PGE, &d);
-        __clear_bit(X86_FEATURE_PSE36, &d);
+
+        if ( !is_pvh_vcpu(curr) )
+        {
+            __clear_bit(X86_FEATURE_PSE, &d);
+            __clear_bit(X86_FEATURE_PGE, &d);
+            __clear_bit(X86_FEATURE_PSE36, &d);
+            __clear_bit(X86_FEATURE_VME, &d);
+        }
     }
 
     switch ( (uint32_t)regs->eax )