The Stage2 input-size must match what the CPU uses because
the SMMU and the CPU share page-tables.
Test that the SMMU supports the P2M IPA bit size, use it if
supported or bail out if not.
Reviewed-by: Julien Grall <julien.grall@citrix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
size = arm_smmu_id_size_to_bits((id >> ID2_IAS_SHIFT) & ID2_IAS_MASK);
smmu->s1_output_size = min_t(unsigned long, PHYS_MASK_SHIFT, size);
- /* Xen: Stage-2 input size is not restricted */
- smmu->s2_input_size = size;
+ /* Xen: Stage-2 input size has to match p2m_ipa_bits. */
+ if (size < p2m_ipa_bits) {
+ dev_err(smmu->dev,
+ "P2M IPA size not supported (P2M=%u SMMU=%lu)!\n",
+ p2m_ipa_bits, size);
+ return -ENODEV;
+ }
+ smmu->s2_input_size = p2m_ipa_bits;
#if 0
/* Stage-2 input size limited due to pgd allocation (PTRS_PER_PGD) */
#ifdef CONFIG_64BIT