}
#ifdef CONFIG_ARM_32
-static inline bool_t is_zero_register(int reg)
+static inline bool is_zero_register(int reg)
{
/* There is no zero register for ARM32 */
- return 0;
+ return false;
}
#else
-static inline bool_t is_zero_register(int reg)
+static inline bool is_zero_register(int reg)
{
/*
* For store/load and sysreg instruction, the encoding 31 always
#endif
}
-static bool_t check_multicall_32bit_clean(struct multicall_entry *multi)
+static bool check_multicall_32bit_clean(struct multicall_entry *multi)
{
int i;
/* Read as zero and write ignore */
static void handle_raz_wi(struct cpu_user_regs *regs,
int regidx,
- bool_t read,
+ bool read,
const union hsr hsr,
int min_el)
{
/* Write only as write ignore */
static void handle_wo_wi(struct cpu_user_regs *regs,
int regidx,
- bool_t read,
+ bool read,
const union hsr hsr,
int min_el)
{
/* Read only as read as zero */
static void handle_ro_raz(struct cpu_user_regs *regs,
int regidx,
- bool_t read,
+ bool read,
const union hsr hsr,
int min_el)
{