x86emul: VMOVNTDQA should raise #GP(0) on mis-alignment

Commit 50b73118d5 introduced emulation of the insn without extending the
set of opcodes requiring special alignment related #GP behavior.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
Release-acked-by: Juergen Gross <jgross@suse.com>

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 8ffda8384a6899e388c782bec198f00bea5358bd..e372c4bb033c37dac8af4f6013c763cd0315161d 100644 (file)
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -8519,11 +8519,12 @@ x86_emulate(
 
             if ( op_bytes < 16 ||
                  (vex.opcx
-                  ? /* vmov{{a,nt}p{s,d},dqa,ntdq} are exceptions. */
-                    ext != ext_0f ||
-                    ((b | 1) != 0x29 && b != 0x2b &&
-                     ((b | 0x10) != 0x7f || vex.pfx != vex_66) &&
-                     b != 0xe7)
+                  ? /* vmov{{a,nt}p{s,d},{,nt}dqa,ntdq} are exceptions. */
+                    ext == ext_0f
+                    ? ((b | 1) != 0x29 && b != 0x2b &&
+                       ((b | 0x10) != 0x7f || vex.pfx != vex_66) &&
+                       b != 0xe7)
+                    : (ext != ext_0f38 || b != 0x2a)
                   : /* movup{s,d}, {,mask}movdqu, and lddqu are exceptions. */
                     ext == ext_0f &&
                     ((b | 1) == 0x11 ||