ventry guest_fiq_invalid_compat // FIQ 32-bit EL0/EL1
ventry guest_error_invalid_compat // Error 32-bit EL0/EL1
+/*
+ * struct vcpu *__context_switch(struct vcpu *prev, struct vcpu *next)
+ *
+ * x0 - prev
+ * x1 - next
+ *
+ * Returns prev in x0
+ */
+ENTRY(__context_switch)
+ add x8, x0, #VCPU_arch_saved_context
+ mov x9, sp
+ stp x19, x20, [x8], #16 // store callee-saved registers
+ stp x21, x22, [x8], #16
+ stp x23, x24, [x8], #16
+ stp x25, x26, [x8], #16
+ stp x27, x28, [x8], #16
+ stp x29, x9, [x8], #16
+ str lr, [x8]
+
+ add x8, x1, #VCPU_arch_saved_context
+ ldp x19, x20, [x8], #16 // restore callee-saved registers
+ ldp x21, x22, [x8], #16
+ ldp x23, x24, [x8], #16
+ ldp x25, x26, [x8], #16
+ ldp x27, x28, [x8], #16
+ ldp x29, x9, [x8], #16
+ ldr lr, [x8]
+ mov sp, x9
+ ret
+
/*
* Local variables:
* mode: ASM
- sizeof(struct cpu_info));
memset(&v->arch.saved_context, 0, sizeof(v->arch.saved_context));
- v->arch.saved_context.sp = (uint32_t)v->arch.cpu_info;
- v->arch.saved_context.pc = (uint32_t)continue_new_vcpu;
+ v->arch.saved_context.sp = (register_t)v->arch.cpu_info;
+ v->arch.saved_context.pc = (register_t)continue_new_vcpu;
/* Idle VCPUs don't need the rest of this setup */
if ( is_idle_vcpu(v) )