xen/arm: vgic-v3: Make clear that GICD_*SPI_* registers are reserved
authorJulien Grall <julien.grall@citrix.com>
Wed, 18 Nov 2015 17:28:06 +0000 (17:28 +0000)
committerIan Campbell <ian.campbell@citrix.com>
Wed, 25 Nov 2015 12:29:30 +0000 (12:29 +0000)
Our vGIC emulation have GICD_TYPER.MBIS set to 0 which means that
GICD_*SPI_* registers are reserved. Implement them using the *_reserved
labels.

Also, implement theses registers for the read part.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
xen/arch/arm/vgic-v3.c

index 44e926a9df13d33c4ef63dbd039d123b7f3a8515..985e8667931aedc807731b53b9c690ca7ccb86d4 100644 (file)
@@ -951,15 +951,31 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v, mmio_info_t *info,
     case VRANGE32(0x0020, 0x003C):
         goto read_impl_defined;
 
+    case VREG32(GICD_SETSPI_NSR):
+        /* Message based SPI is not implemented */
+        goto read_reserved;
+
     case VREG32(0x0044):
         goto read_reserved;
 
+    case VREG32(GICD_CLRSPI_NSR):
+        /* Message based SPI is not implemented */
+        goto read_reserved;
+
     case VREG32(0x004C):
         goto read_reserved;
 
+    case VREG32(GICD_SETSPI_SR):
+        /* Message based SPI is not implemented */
+        goto read_reserved;
+
     case VREG32(0x0054):
         goto read_reserved;
 
+    case VREG32(GICD_CLRSPI_SR):
+        /* Message based SPI is not implemented */
+        goto read_reserved;
+
     case VRANGE32(0x005C, 0x007C):
         goto read_reserved;
 
@@ -1125,28 +1141,28 @@ static int vgic_v3_distr_mmio_write(struct vcpu *v, mmio_info_t *info,
 
     case VREG32(GICD_SETSPI_NSR):
         /* Message based SPI is not implemented */
-        goto write_ignore_32;
+        goto write_reserved;
 
     case VREG32(0x0044):
         goto write_reserved;
 
     case VREG32(GICD_CLRSPI_NSR):
         /* Message based SPI is not implemented */
-        goto write_ignore_32;
+        goto write_reserved;
 
     case VREG32(0x004C):
         goto write_reserved;
 
     case VREG32(GICD_SETSPI_SR):
         /* Message based SPI is not implemented */
-        goto write_ignore_32;
+        goto write_reserved;
 
     case VREG32(0x0054):
         goto write_reserved;
 
     case VREG32(GICD_CLRSPI_SR):
         /* Message based SPI is not implemented */
-        goto write_ignore_32;
+        goto write_reserved;
 
     case VRANGE32(0x005C, 0x007C):
         goto write_reserved;