uint32_t flags = pirq_dpci->gmsi.gflags;
int vector = pirq_dpci->gmsi.gvec;
uint8_t dest = (uint8_t)flags;
- uint8_t dest_mode = !!(flags & VMSI_DM_MASK);
- uint8_t delivery_mode = (flags & VMSI_DELIV_MASK)
- >> GFLAGS_SHIFT_DELIV_MODE;
- uint8_t trig_mode = (flags&VMSI_TRIG_MODE) >> GFLAGS_SHIFT_TRG_MODE;
+ bool dest_mode = flags & XEN_DOMCTL_VMSI_X86_DM_MASK;
+ uint8_t delivery_mode = MASK_EXTR(flags, XEN_DOMCTL_VMSI_X86_DELIV_MASK);
+ bool trig_mode = flags & XEN_DOMCTL_VMSI_X86_TRIG_MASK;
HVM_DBG_LOG(DBG_LEVEL_IOAPIC,
"msi: dest=%x dest_mode=%x delivery_mode=%x "
{
case PT_IRQ_TYPE_MSI:
{
- uint8_t dest, dest_mode, delivery_mode;
+ uint8_t dest, delivery_mode;
+ bool dest_mode;
int dest_vcpu_id;
const struct vcpu *vcpu;
- uint32_t gflags = pt_irq_bind->u.msi.gflags & ~VMSI_UNMASKED;
+ uint32_t gflags = pt_irq_bind->u.msi.gflags &
+ ~XEN_DOMCTL_VMSI_X86_UNMASKED;
if ( !(pirq_dpci->flags & HVM_IRQ_DPCI_MAPPED) )
{
}
}
/* Calculate dest_vcpu_id for MSI-type pirq migration. */
- dest = pirq_dpci->gmsi.gflags & VMSI_DEST_ID_MASK;
- dest_mode = !!(pirq_dpci->gmsi.gflags & VMSI_DM_MASK);
- delivery_mode = (pirq_dpci->gmsi.gflags & VMSI_DELIV_MASK) >>
- GFLAGS_SHIFT_DELIV_MODE;
+ dest = MASK_EXTR(pirq_dpci->gmsi.gflags,
+ XEN_DOMCTL_VMSI_X86_DEST_ID_MASK);
+ dest_mode = pirq_dpci->gmsi.gflags & XEN_DOMCTL_VMSI_X86_DM_MASK;
+ delivery_mode = MASK_EXTR(pirq_dpci->gmsi.gflags,
+ XEN_DOMCTL_VMSI_X86_DELIV_MASK);
dest_vcpu_id = hvm_girq_dest_2_vcpu_id(d, dest, dest_mode);
pirq_dpci->gmsi.dest_vcpu_id = dest_vcpu_id;
pi_update_irte(vcpu ? &vcpu->arch.hvm_vmx.pi_desc : NULL,
info, pirq_dpci->gmsi.gvec);
- if ( pt_irq_bind->u.msi.gflags & VMSI_UNMASKED )
+ if ( pt_irq_bind->u.msi.gflags & XEN_DOMCTL_VMSI_X86_UNMASKED )
{
unsigned long flags;
struct irq_desc *desc = pirq_spin_lock_irq_desc(info, &flags);
if ( (pirq_dpci->flags & HVM_IRQ_DPCI_MACH_MSI) &&
(pirq_dpci->gmsi.gvec == vector) )
{
- int dest = pirq_dpci->gmsi.gflags & VMSI_DEST_ID_MASK;
- int dest_mode = !!(pirq_dpci->gmsi.gflags & VMSI_DM_MASK);
+ unsigned int dest = MASK_EXTR(pirq_dpci->gmsi.gflags,
+ XEN_DOMCTL_VMSI_X86_DEST_ID_MASK);
+ bool dest_mode = pirq_dpci->gmsi.gflags & XEN_DOMCTL_VMSI_X86_DM_MASK;
if ( vlapic_match_dest(vcpu_vlapic(current), NULL, 0, dest,
dest_mode) )
#define HVM_IRQ_DPCI_IDENTITY_GSI (1u << _HVM_IRQ_DPCI_IDENTITY_GSI_SHIFT)
#define HVM_IRQ_DPCI_TRANSLATE (1u << _HVM_IRQ_DPCI_TRANSLATE_SHIFT)
-#define VMSI_DEST_ID_MASK 0xff
-#define VMSI_RH_MASK 0x100
-#define VMSI_DM_MASK 0x200
-#define VMSI_DELIV_MASK 0x7000
-#define VMSI_TRIG_MODE 0x8000
-#define VMSI_UNMASKED 0x10000
-
-#define GFLAGS_SHIFT_RH 8
-#define GFLAGS_SHIFT_DELIV_MODE 12
-#define GFLAGS_SHIFT_TRG_MODE 15
-
struct hvm_gmsi_info {
uint32_t gvec;
uint32_t gflags;