xen: arm: remove unnecessary cache flush in write_pte

On a ARMv7/v8 SMP system the MMU is coherent

Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
[ ijc -- dropped the associated dsb too ]

diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
index 38bcffde6dddfc6ce4375c00e8f567fb5df29335..cf12a89ae60ce4bf3163f531f97449199554e1fc 100644 (file)
--- a/xen/include/asm-arm/arm32/page.h
+++ b/xen/include/asm-arm/arm32/page.h
@@ -16,10 +16,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
         /* Safely write the entry (STRD is atomic on CPUs that support LPAE) */
         "strd %0, %H0, [%1];"
         "dsb;"
-        /* Push this cacheline to the PoC so the rest of the system sees it. */
-        STORE_CP32(1, DCCMVAC)
-        /* Ensure that the data flush is completed before proceeding */
-        "dsb;"
         : : "r" (pte.bits), "r" (p) : "memory");
 }
 

diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h
index bd48fe3d023281eb98d27d11df4800c2ea6e10d4..9551f90844b5ab1ce4e442023ac81d55d7af830e 100644 (file)
--- a/xen/include/asm-arm/arm64/page.h
+++ b/xen/include/asm-arm/arm64/page.h
@@ -11,10 +11,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
         "dsb sy;"
         "str %0, [%1];"         /* Write the entry */
         "dsb sy;"
-        /* Push this cacheline to the PoC so the rest of the system sees it. */
-        "dc cvac, %1;"
-        /* Ensure that the data flush is completed before proceeding */
-        "dsb sy;"
         : : "r" (pte.bits), "r" (p) : "memory");
 }